diff --git a/tb/shinTest/gen_pkt.py b/tb/shinTest/gen_pkt.py index 9a607ef..8ec63b3 100755 --- a/tb/shinTest/gen_pkt.py +++ b/tb/shinTest/gen_pkt.py @@ -21,9 +21,7 @@ if __name__ == '__main__': environment.set_using_8b10b(args.use_8b10b) environment.bringup() - #add_tc_2_runlist(rwregs.tc1()) - - #''' + ''' add_tc_2_runlist(errorPkt.tc1()) add_tc_2_runlist(errorPkt.tc2()) add_tc_2_runlist(errorPkt.tc3()) @@ -63,10 +61,12 @@ if __name__ == '__main__': add_tc_2_runlist(errorPkt.tc37()) add_tc_2_runlist(errorPkt.tc38()) #''' - - #add_tc_2_runlist(rwregs.tc2()) - #''' + add_tc_2_runlist(rwregs.tc1()) + #add_tc_2_runlist(rwregs.tc2()) + add_tc_2_runlist(rwregs.tc3()) + + ''' add_tc_2_runlist(base.tc1()) add_tc_2_runlist(base.tc2()) add_tc_2_runlist(base.tc3()) @@ -97,15 +97,16 @@ if __name__ == '__main__': add_tc_2_runlist(base.tc28()) add_tc_2_runlist(base.tc29()) add_tc_2_runlist(base.tc30()) + add_tc_2_runlist(base.tc31()) #''' - #''' + ''' add_tc_2_runlist(broadcast.tc1()) add_tc_2_runlist(broadcast.tc2()) add_tc_2_runlist(broadcast.tc3()) #''' - #''' + ''' add_tc_2_runlist(sync.tc1()) add_tc_2_runlist(sync.tc2()) add_tc_2_runlist(sync.tc3()) @@ -115,7 +116,7 @@ if __name__ == '__main__': add_tc_2_runlist(sync.tc7()) #''' - #''' + ''' add_tc_2_runlist(ebmmu.tc1()) add_tc_2_runlist(ebmmu.tc2()) add_tc_2_runlist(ebmmu.tc3()) diff --git a/tb/shinTest/testcase/base.py b/tb/shinTest/testcase/base.py index cc2fc7f..412d256 100644 --- a/tb/shinTest/testcase/base.py +++ b/tb/shinTest/testcase/base.py @@ -510,8 +510,8 @@ def tc8(): +"\n#5000\n" +genIFRwDataCode(0, 0x09, True, 1, [0, ], False, iface=1) +genIFRwDataCode(2, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_code(0) - +using_proper_code(2) + +using_proper_transcode(0) + +using_proper_transcode(2) +genMessageCode("--读取中断") +genIFRwDataCode(0, 0x74, False, 4) @@ -2120,8 +2120,8 @@ def tc28(): +"#5000" +genIFRwDataCode(0, 0x09, True, 1, [0, ], False, iface=1) +genIFRwDataCode(4, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_code(0) - +using_proper_code(4) + +using_proper_transcode(0) + +using_proper_transcode(4) +genMessageCode("--读取中断") +genIFRwDataCode(0, 0x74, False, 4) @@ -2336,8 +2336,8 @@ def tc28(): +"#5000" +genIFRwDataCode(0, 0x09, True, 1, [0, ], False, iface=1) +genIFRwDataCode(4, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_code(0) - +using_proper_code(4) + +using_proper_transcode(0) + +using_proper_transcode(4) +genMessageCode("--读取中断") +genIFRwDataCode(0, 0x74, False, 4) @@ -2627,7 +2627,7 @@ def tc31(): +genIFRwDataCode(4, 0x40, True, 4, [0x01, 0x00, 0x66, 0x79]) +"#5000" +genIFRwDataCode(4, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_code(4) + +using_proper_transcode(4) +genIFRwDataCode(4, 0x0, True, 1, [1, ]) +genIFRwDataCode(4, 0x78, True, 4, [0xff, 0xff, 0xff, 0xff]) #+genEnableInsertTimeCode(0xa) @@ -2823,7 +2823,7 @@ def tc31(): +genIFRwDataCode(0, 0x40, True, 4, [0x01, 0x00, 0x66, 0x79]) +"#5000\n" +genIFRwDataCode(0, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_code(0) + +using_proper_transcode(0) +genIFRwDataCode(0, 0x0, True, 1, [1, ]) +genIFRwDataCode(0, 0x78, True, 4, [0xff, 0xff, 0xff, 0xff]) +genIFRwDataCode(0, 0x7c, True, 2, [0x10, 0x80]) @@ -3005,7 +3005,7 @@ def tc31(): +genIFRwDataCode(4, 0x40, True, 4, [0x01, 0x00, 0x66, 0x79]) +"#5000" +genIFRwDataCode(4, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_code(4) + +using_proper_transcode(4) +genIFRwDataCode(4, 0x00, True, 1, [2, ]) +genIFRwDataCode(4, 0x78, True, 4, [0xff, 0xff, 0xff, 0xff]) ) diff --git a/tb/shinTest/testcase/environment.py b/tb/shinTest/testcase/environment.py index 81f9863..2bcb66d 100644 --- a/tb/shinTest/testcase/environment.py +++ b/tb/shinTest/testcase/environment.py @@ -30,11 +30,11 @@ def bringup(): +genIFRwDataCode(3, 0x78, True, 4, [0xff, 0xff, 0xff, 0xff]) +genIFRwDataCode(4, 0x78, True, 4, [0xff, 0xff, 0xff, 0xff]) +genMessageCode("--设置合适的底层编码4b5b or 8b10b") - +using_proper_code(0) - +using_proper_code(1) - +using_proper_code(2) - +using_proper_code(3) - +using_proper_code(4) + +using_proper_transcode(0) + +using_proper_transcode(1) + +using_proper_transcode(2) + +using_proper_transcode(3) + +using_proper_transcode(4) ) main_dev = [0x01, ] @@ -416,7 +416,7 @@ def set_using_8b10b(isUsing8b10b): global global_using_8b10b global_using_8b10b = isUsing8b10b -def using_proper_code(dev): +def using_proper_transcode(dev): global global_using_8b10b if global_using_8b10b: return genIFRwDataCode(dev, 0x004c, True, 2, [0x1, 0x59], wlog = False) diff --git a/tb/shinTest/testcase/rwregs.py b/tb/shinTest/testcase/rwregs.py index 7ac5b0d..db75d61 100644 --- a/tb/shinTest/testcase/rwregs.py +++ b/tb/shinTest/testcase/rwregs.py @@ -7,7 +7,7 @@ import random def tc1(): gen_file_def = "regtest_tc01" sm_idx = 0 - tc_des = "测试寄存器的读写状态,将系统改为8B10B进行通信\\n" + tc_des = "测试寄存器的读写状态,将系统改为8B10B进行通信。特别测试SPI/QSPI读写密码正确和不正确的情况下,对读写的封堵。\\n" genPkt = GenPkt() genPkt.clean() @@ -16,17 +16,71 @@ def tc1(): genPkt.addBeforeExc(genTcStartFrameCode(gen_file_def, tc_des)) - change_8b10b_code = "" + change_8b10b_code1 = "" for i in range(dev_num + 1): - change_8b10b_code = change_8b10b_code + genIFRwDataCode(i, 0x004c, True, 2, [0x1, 0x59])\ + change_8b10b_code1 = change_8b10b_code1 + genIFRwDataCode(i, 0x004c, True, 2, [0x0, 0x59])\ + +genIFRwDataCode(i, 0x004c, False, 2) + + change_8b10b_code2 = "" + for i in range(dev_num + 1): + change_8b10b_code2 = change_8b10b_code2 + genIFRwDataCode(i, 0x004c, True, 2, [0x1, 0x59])\ + +genIFRwDataCode(i, 0x004c, False, 2) + + invalid_change_8b10b_code1 = "" + for i in range(dev_num + 1): + invalid_change_8b10b_code1 = invalid_change_8b10b_code1 + genIFRwDataCode(i, 0x004c, True, 2, [0x0, 0x32])\ + +genIFRwDataCode(i, 0x004c, False, 2) + + invalid_change_8b10b_code2 = "" + for i in range(dev_num + 1): + invalid_change_8b10b_code2 = invalid_change_8b10b_code2 + genIFRwDataCode(i, 0x004c, True, 2, [0x1, 0x43])\ + +genIFRwDataCode(i, 0x004c, False, 2) + + invalid_change_8b10b_code3 = "" + for i in range(dev_num + 1): + invalid_change_8b10b_code3 = invalid_change_8b10b_code3 + genIFRwDataCode(i, 0x004c, True, 1, [0x0, ])\ + +genIFRwDataCode(i, 0x004c, False, 2) + + invalid_change_8b10b_code4 = "" + for i in range(dev_num + 1): + invalid_change_8b10b_code4 = invalid_change_8b10b_code4 + genIFRwDataCode(i, 0x004c, True, 1, [0x1, ])\ + +genIFRwDataCode(i, 0x004c, False, 2) + + invalid_change_8b10b_code5 = "" + for i in range(dev_num + 1): + invalid_change_8b10b_code5 = invalid_change_8b10b_code5 + genIFRwDataCode(i, 0x004c, True, 2, [0x30, 0x59])\ + +genIFRwDataCode(i, 0x004c, False, 2) + + invalid_change_8b10b_code6 = "" + for i in range(dev_num + 1): + invalid_change_8b10b_code6 = invalid_change_8b10b_code6 + genIFRwDataCode(i, 0x004c, True, 2, [0x23, 0x59])\ +genIFRwDataCode(i, 0x004c, False, 2) - - genPkt.addAfterExc(#genWriteTransLenCode(gen_file_def, sm_idx) - #+genWriteTransPktCode(gen_file_def, sm_idx) - #+genTrgTransPktCode(gen_file_def, sm_idx) - #+genReadAckPktCode(gen_file_def, sm_idx) - change_8b10b_code + default_trans_code = "" + for i in range(dev_num + 1): + default_trans_code = default_trans_code + using_proper_transcode(i) + + genPkt.addAfterExc(genMessageCode("--正确的key") + +change_8b10b_code1 + +genMessageCode("--错误的key") + +invalid_change_8b10b_code4 + +genMessageCode("--错误的key") + +invalid_change_8b10b_code1 + +genMessageCode("--错误的key") + +invalid_change_8b10b_code2 + +genMessageCode("--正确的key") + +change_8b10b_code2 + +genMessageCode("--错误的key") + +invalid_change_8b10b_code3 + +genMessageCode("--错误的key") + +invalid_change_8b10b_code1 + +genMessageCode("--错误的key") + +invalid_change_8b10b_code2 + +genMessageCode("--正确的key_错误的数据") + +invalid_change_8b10b_code5 + +invalid_change_8b10b_code6 + +genMessageCode("--恢复默认的配置") + +default_trans_code +genTcEndFrameCode(gen_file_def)) genPkt.gen("./generated/shin/%s.vh"%(gen_file_def, ), 1) return gen_file_def @@ -42,7 +96,8 @@ def tc2(): dev_num = get_slv_dev_num() - genPkt.addBeforeExc(genTcStartFrameCode(gen_file_def, tc_des)) + genPkt.addBeforeExc(genTcStartFrameCode(gen_file_def, tc_des) + ) change_4b5b_code = "" for i in range(dev_num + 1): @@ -57,4 +112,54 @@ def tc2(): change_4b5b_code +genTcEndFrameCode(gen_file_def)) genPkt.gen("./generated/shin/%s.vh"%(gen_file_def, ), 1) - return gen_file_def \ No newline at end of file + return gen_file_def + +def tc3(): + gen_file_def = "regtest_tc03" + sm_idx = 0 + tc_des = "测试SM0~SM7的的长度寄存器的读写,要求在内部有元素的情况下,不能改写其长度。\\n" + + genPkt = GenPkt() + genPkt.clean() + genPkt.setPktType(0) + + dev_num = get_slv_dev_num() + + chang_sm_length = "" + for i in range(dev_num + 1): + chang_sm_length = chang_sm_length + genIFRwDataCode(i, 0x0302, True, 2, [0x20, 0x00]) + + + + genPkt.addBeforeExc(genTcStartFrameCode(gen_file_def, tc_des) + +chang_sm_length + +genMessageCode("--清除主中断") + +genIFRwDataCode(0, 0x78, True, 4, [0xff, 0xff, 0xff, 0xff]) + ) + + genPkt.addSubPkt(0x0, 0x0, 0x0800, 0xe, 0x20, [0, ] * 0x20) + + chang_sm_length = "" + for i in range(dev_num + 1): + chang_sm_length = chang_sm_length + genIFRwDataCode(i, 0x0302, True, 2, [0x40, 0x00]) + + read_sm_status = "" + for i in range(dev_num + 1): + read_sm_status = read_sm_status + genIFRwDataCode(i, 0x0300, False, 4) + + reset_sm = "" + for i in range(dev_num + 1): + reset_sm = reset_sm + genIFRwDataCode(i, 0x0300, True, 1, [0, ]) + + genPkt.addAfterExc(genWriteTransLenCode(gen_file_def, sm_idx) + +genWriteTransPktCode(gen_file_def, sm_idx) + +genTrgTransPktCode(gen_file_def, sm_idx) + +genReadAckPktCode(gen_file_def, sm_idx) + +chang_sm_length + +read_sm_status + +reset_sm + +read_sm_status + +genTcEndFrameCode(gen_file_def)) + genPkt.gen("./generated/shin/%s.vh"%(gen_file_def, ), 1) + return gen_file_def + diff --git a/tb/shinTest/testcase/sync.py b/tb/shinTest/testcase/sync.py index 3cf68f4..6cf31ca 100644 --- a/tb/shinTest/testcase/sync.py +++ b/tb/shinTest/testcase/sync.py @@ -830,7 +830,7 @@ def tc5(): +genIFRwDataCode(3, 0xc0, False, 4) +genIFRwDataCode(4, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_code(4) + +using_proper_transcode(4) +genIFRwDataCode(4, 0x00, True, 1, [0x2, ]) +genIFRwDataCode(4, 0x78, True, 4, [0xff, 0xff, 0xff, 0xff]) @@ -1332,7 +1332,7 @@ def tc7(): genPkt.addBeforeExc("\n#5000\n" +genIFRwDataCode(0, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_code(0) + +using_proper_transcode(0) +genIFRwDataCode(0, 0x74, False, 4) #+genIFRwDataCode(0, 0x40, False, 4) diff --git a/tb/shinTest/testcase_result/regtest_tc01_result.log b/tb/shinTest/testcase_result/regtest_tc01_result.log new file mode 100644 index 0000000..84d263a --- /dev/null +++ b/tb/shinTest/testcase_result/regtest_tc01_result.log @@ -0,0 +1,100 @@ +16'h004c 8'h00 16'h0002 8'h00 8'h59 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h00 8'h59 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h00 8'h59 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h00 8'h59 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h00 8'h59 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0001 8'h01 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0001 8'h01 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0001 8'h01 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0001 8'h01 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0001 8'h01 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h00 8'h32 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h00 8'h32 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h00 8'h32 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h00 8'h32 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h00 8'h32 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h43 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h43 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h43 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h43 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h43 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h59 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h59 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h59 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h59 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h59 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0001 8'h00 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0001 8'h00 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0001 8'h00 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0001 8'h00 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0001 8'h00 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h00 8'h32 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h00 8'h32 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h00 8'h32 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h00 8'h32 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h00 8'h32 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h43 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h43 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h43 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h43 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h01 8'h43 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h30 8'h59 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h30 8'h59 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h30 8'h59 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h30 8'h59 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h30 8'h59 +16'h004c 8'h80 16'h0002 8'h00 8'h00 +16'h004c 8'h00 16'h0002 8'h23 8'h59 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h23 8'h59 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h23 8'h59 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h23 8'h59 +16'h004c 8'h80 16'h0002 8'h01 8'h00 +16'h004c 8'h00 16'h0002 8'h23 8'h59 +16'h004c 8'h80 16'h0002 8'h01 8'h00