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写完软件需要加gpio

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Ruige Lee (WSL)
2025-01-16 16:34:48 +08:00
parent f63e3a831b
commit e54ddab4e2
9 changed files with 419 additions and 572 deletions
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Makefile
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@@ -9,7 +9,6 @@ compile:
cd ./rocket-chip/vsim && make verilog CONFIG=freechips.rocketchip.system.RtppConfig
cp ./rocket-chip/vsim/generated-src/freechips.rocketchip.system.RtppConfig.v ./generated/Rtpp/RtppConfig.v
cp ./rocket-chip/vsim/generated-src/freechips.rocketchip.system.RtppConfig.behav_srams.v ./generated/Rtpp/behav_srams.v
cp ./rocket-chip/vsim/generated-src/freechips.rocketchip.system.RtppConfig/plusarg_reader.v ./generated/Rtpp/plusarg_reader.v
# sbt "test:runMain test.testModule"
back: