From e4a0c8d30dcf2d7b18a7e60c07f9a79bd564e4c2 Mon Sep 17 00:00:00 2001 From: Ruige Lee Date: Mon, 29 Sep 2025 12:08:04 +0800 Subject: [PATCH] =?UTF-8?q?=E5=AF=B9=E9=BD=90=E7=9C=8B=E9=97=A8=E7=8B=97?= =?UTF-8?q?=E4=BD=BF=E8=83=BD=E7=9A=84=E5=AF=84=E5=AD=98=E5=99=A8?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/main/scala/backBoard/shin/MstSlvSwitch.scala | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/main/scala/backBoard/shin/MstSlvSwitch.scala b/src/main/scala/backBoard/shin/MstSlvSwitch.scala index 58721e8..017c350 100644 --- a/src/main/scala/backBoard/shin/MstSlvSwitch.scala +++ b/src/main/scala/backBoard/shin/MstSlvSwitch.scala @@ -456,13 +456,13 @@ trait MstSlvSwitchWatchDog{ this: MstSlvSwitchBase => for( i <- 0 until 8 ){ when( smUnit(i).io.enq ){ isWdtSMEnable(2*i) := false.B - } .elsewhen( ~isWdtSMEnable(2*i) & smUnit(i).io.sram_w.enw & interface.io.cReg.wdtEnable.extract(i+1) ){ + } .elsewhen( ~isWdtSMEnable(2*i) & smUnit(i).io.sram_w.enw & interface.io.cReg.wdtEnable.extract(2*i+1) ){ isWdtSMEnable(2*i) := true.B } - when( smUnit(i).io.deq ){ + when( smUnit(i).io.deq ){ isWdtSMEnable(2*i + 1) := false.B - } .elsewhen( ~isWdtSMEnable(2*i + 1) & smUnit(i).io.sram_r.enr & interface.io.cReg.wdtEnable.extract(i+1) ){ + } .elsewhen( ~isWdtSMEnable(2*i + 1) & smUnit(i).io.sram_r.enr & interface.io.cReg.wdtEnable.extract(2*i+2) ){ isWdtSMEnable(2*i + 1) := true.B } }