From e45f407a1d9aabd1a0bd0ef8dd96ec781dffb827 Mon Sep 17 00:00:00 2001 From: RuigeLee Date: Fri, 19 Sep 2025 16:19:53 +0800 Subject: [PATCH] =?UTF-8?q?=E4=BF=AE=E6=94=B9dataw=5Fasync=E7=9A=84?= =?UTF-8?q?=E6=9B=B4=E6=96=B0=E7=AD=96=E7=95=A5?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/main/scala/backBoard/shin/NSpiInterface.scala | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/main/scala/backBoard/shin/NSpiInterface.scala b/src/main/scala/backBoard/shin/NSpiInterface.scala index 3d98a4e..c2e38d6 100644 --- a/src/main/scala/backBoard/shin/NSpiInterface.scala +++ b/src/main/scala/backBoard/shin/NSpiInterface.scala @@ -128,12 +128,12 @@ trait SyncSpiAsync{ this: SyncSpiInterfaceBase => } } - when( bitSel === 0.U ){ - when( byteSel > 3.U & isSpiWrite ){ + when( bitSel.andR ){ + when( byteSel >= 4.U & isSpiWrite ){ when( ~isPing_async ){ - dataw_async(0) := exRegi + dataw_async(0) := Cat( exRegi(3,0), qspi.mosi ) } .otherwise{ - dataw_async(1) := exRegi + dataw_async(1) := Cat( exRegi(3,0), qspi.mosi ) } } }