diff --git a/src/main/scala/backBoard/shin/NSpiInterface.scala b/src/main/scala/backBoard/shin/NSpiInterface.scala
index 3d98a4e..c2e38d6 100644
--- a/src/main/scala/backBoard/shin/NSpiInterface.scala
+++ b/src/main/scala/backBoard/shin/NSpiInterface.scala
@@ -128,12 +128,12 @@ trait SyncSpiAsync{ this: SyncSpiInterfaceBase =>
     }
   }
 
-  when( bitSel === 0.U ){
-    when( byteSel > 3.U & isSpiWrite ){
+  when( bitSel.andR ){
+    when( byteSel >= 4.U & isSpiWrite ){
       when( ~isPing_async ){
-        dataw_async(0) := exRegi
+        dataw_async(0) := Cat( exRegi(3,0), qspi.mosi )
       } .otherwise{
-        dataw_async(1) := exRegi
+        dataw_async(1) := Cat( exRegi(3,0), qspi.mosi )
       }
     }    
   }