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分别采用中断、查询方式优化转发时间，上传备份代码，通过控制Makefile脚本里的APP_MARCH、MABI的rv32i和rv32e来控制C语言和asm优化

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This commit is contained in:
bacon
2025-02-12 15:58:50 +08:00
parent 0aa00781e5
commit d87c2dacf0
10 changed files with 181 additions and 323 deletions
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46
Makefile
View File

@@ -84,24 +84,24 @@ sw:
$(RVCC) -ggdb $(ISR_MARCH) $(ISR_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/src/mstSvr.S \
-o ./tb/sw/build/mstSvr.o
-c ./tb/sw/src/hlmSvrOpt.S \
-o ./tb/sw/build/hlmSvrOpt.o
$(RVCC) -ggdb $(ISR_MARCH) $(ISR_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
-T ./tb/sw/linker.lds \
./tb/sw/build/mstSvr.o \
-o ./tb/sw/build/mstSvr.elf
./tb/sw/build/hlmSvrOpt.o \
-o ./tb/sw/build/hlmSvrOpt.elf
$(TARGET)-objcopy -O binary ./tb/sw/build/mstSvr.elf ./tb/sw/build/mstSvr.bin
$(TARGET)-objcopy -O binary ./tb/sw/build/hlmSvrOpt.elf ./tb/sw/build/hlmSvrOpt.bin
python3 ./tb/sw/bin_2_c_array.py ./tb/sw/build/mstSvr.bin ./tb/sw/build/mstSvr.c
python3 ./tb/sw/bin_2_c_array.py ./tb/sw/build/hlmSvrOpt.bin ./tb/sw/build/hlmSvrOpt.c
#这是主站的程序
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/build/mstSvr.c \
-o ./tb/sw/build/mstSvr.o
-c ./tb/sw/build/hlmSvrOpt.c \
-o ./tb/sw/build/hlmSvrOpt.o
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
@@ -137,7 +137,7 @@ sw:
-T ./tb/sw/linker.lds \
./tb/sw/build/mstStartup.o \
./tb/sw/build/mstMain.o \
./tb/sw/build/mstSvr.o \
./tb/sw/build/hlmSvrOpt.o \
./tb/sw/build/tl2cdr.o \
./tb/sw/build/halfLvdsMacSvr.o \
./tb/sw/build/plic.o \
@@ -151,27 +151,27 @@ sw:
sed -i 's/@400/@000/g' ./tb/sw/build/mstTest.verilog
#这是从站的中断服务程序，以及初始化程序
$(RVCC) -ggdb $(ISR_MARCH) $(ISR_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/src/slvSvr.S \
-o ./tb/sw/build/slvSvr.o
#$(RVCC) -ggdb $(ISR_MARCH) $(ISR_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
#-I ./tb/sw/ -I ./tb/sw/src \
#-I ./tb/sw/tl2cdr \
#-c ./tb/sw/src/slvSvr.S \
#-o ./tb/sw/build/slvSvr.o
$(RVCC) -ggdb $(ISR_MARCH) $(ISR_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
-T ./tb/sw/linker.lds \
./tb/sw/build/slvSvr.o \
-o ./tb/sw/build/slvSvr.elf
#$(RVCC) -ggdb $(ISR_MARCH) $(ISR_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
#-T ./tb/sw/linker.lds \
#./tb/sw/build/slvSvr.o \
#-o ./tb/sw/build/slvSvr.elf
$(TARGET)-objcopy -O binary ./tb/sw/build/slvSvr.elf ./tb/sw/build/slvSvr.bin
#$(TARGET)-objcopy -O binary ./tb/sw/build/slvSvr.elf ./tb/sw/build/slvSvr.bin
python3 ./tb/sw/bin_2_c_array.py ./tb/sw/build/slvSvr.bin ./tb/sw/build/slvSvr.c
#python3 ./tb/sw/bin_2_c_array.py ./tb/sw/build/slvSvr.bin ./tb/sw/build/slvSvr.c
#这是从站的程序
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/build/slvSvr.c \
-o ./tb/sw/build/slvSvr.o
-c ./tb/sw/build/hlmSvrOpt.c \
-o ./tb/sw/build/hlmSvrOpt.o
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
@@ -205,7 +205,7 @@ sw:
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
-T ./tb/sw/linker.lds \
./tb/sw/build/slvSvr.o \
./tb/sw/build/hlmSvrOpt.o \
./tb/sw/build/slvStartup.o \
./tb/sw/build/slvMain.o \
./tb/sw/build/tl2cdr.o \

2
rocket-chip

Submodule rocket-chip updated: 2131fe7cd6...98770cc277

10
tb/sw/src/MstMain.c
View File

@@ -5,10 +5,6 @@
#include "halfLvdsMacSvr.h"
#include "plic.h"
#ifdef __riscv_i
#define USING_POLL_STRATEGY
#endif
//-------------------------------------------------------------------
//internal function
static uint32_t init_plic(void);
@@ -26,13 +22,9 @@ void main()
for (i = 0; i < 100; i++)
asm volatile("nop");
#ifdef USING_POLL_STRATEGY
//使用查询策略 POLL_STRATEGY 操作 half lvds mac
HLM_poll(WORKMODE_MASTER);
#else
//使用中断策略操作half lvds mac
HLM_work_with_isr(WORKMODE_MASTER);
#endif
while (1);
}

12
tb/sw/src/SlvMain.c
View File

@@ -8,12 +8,6 @@
#include "sysDef.h"
#include "plic.h"
#ifdef __riscv_i
#define USING_POLL_STRATEGY
#endif
static void error();
static uint32_t init_plic(void);
@@ -33,15 +27,9 @@ void main()
//tx1 上行
//rx0 下行
//rx1 上行
#ifdef USING_POLL_STRATEGY
//使用查询策略 POLL_STRATEGY 操作 half lvds mac
HLM_poll(WORKMODE_SLAVE);
#else
//使用中断策略操作half lvds mac
HLM_work_with_isr(WORKMODE_SLAVE);
#endif
while (1);
}

80
tb/sw/src/halfLvdsMacSvr.c
View File

@@ -13,51 +13,6 @@ uint8_t MST_RX_BUF[RX_BUF_NUM * RX_BUF_MAX_LEN] __attribute__((aligned(32)));
extern const uint8_t int_svr_code[];
uint32_t (*sys_call)(uint32_t no, ...);
uint32_t HLM_work_with_isr(uint32_t mode)
{
int i;
sys_call = (void *)int_svr_code;
//复位脉冲
*tx0_softReset = 1;
*tx1_softReset = 1;
*rx0_softReset = 1;
*rx1_softReset = 1;
//tx0 下行
//tx1 上行
//rx0 下行
//rx1 上行
if (mode == WORKMODE_MASTER)
{
uint32_t tx_len;
tx_len = 32;
for (i = 0; i < tx_len - 1; i++)
{
MST_TX_BUF[i] = i;
}
sys_call(SYS_SET_RECV_INFO, MST_RX_BUF);
sys_call(SYS_SEND_DATA, MST_TX_BUF, tx_len);
}
else if (mode == WORKMODE_SLAVE)
{
}
else
{
}
return 0;
}
/*
#define CDR_INT_TX0END 14U
#define CDR_INT_TX1END 15U
@@ -75,6 +30,14 @@ uint32_t HLM_work_with_isr(uint32_t mode)
volatile uint32_t isr_flag[32] = {0};
uint32_t HLM_poll(uint32_t mode)
{
sys_call = (void *)int_svr_code;
//复位脉冲
*tx0_softReset = 1;
*tx1_softReset = 1;
*rx0_softReset = 1;
*rx1_softReset = 1;
if (mode == WORKMODE_MASTER)
{
uint32_t tx_pkt_len = 256;
@@ -165,6 +128,19 @@ uint32_t HLM_poll(uint32_t mode)
*rx1_rxTimerAim = 0;
*plic_enable_0_31 = 0;
#ifdef __riscv_e
sys_call(SYS_SLAVE_WORK);
#else
while(1)
{
status = *HLM_status;
if (status & HLM_RX0_VALID)
{
rx_start = 1;
break;
}
}
while (1)
{
@@ -185,24 +161,12 @@ uint32_t HLM_poll(uint32_t mode)
if (rx_pkt_len <= (rx_index * 4))
{
rx_start = 0;
break;
}
}
else
{
if (status & HLM_RX0_VALID)
rx_start = 1;
}
#if 0
//rx0 下行
if (isr_flag[CDR_INT_RX0START])
{
isr_flag[CDR_INT_RX0START] = 0;
rx_start = 1;
}
#endif
}
}
else
{

125
tb/sw/src/mstSvr.S → tb/sw/src/hlmSvrOpt.S
View File

@@ -1,5 +1,6 @@
#include "tl2cdr.h"
#include "sysDef.h"
#include "plic.h"
#if 0
/*
@@ -45,7 +46,130 @@ x31, 最大的服务中断号
.globl _rv32i_plic_handle
.section .text.init, "ax", %progbits
_prog_start:
//a0 call_function no
li x16, SYS_INIT
beqz a0, init_func //初始化系统，输入必要的地址信息，返回 中断程序 的地址
li x16, SYS_SEND_DATA
beq a0, x16, send_data_func
li x16, SYS_SET_RECV_INFO
beq a0, x16, set_recv_info_func
li x16, SYS_SLAVE_WORK
beq a0, x16, slave_work_func
10: j 10b //死循环，输入错误的功能号
ret //心理安慰，并不会返回
//初始化系统，输入必要的地址信息，返回中断程序的地址
//a1, plic_claim的地址, 其实也可以不用传送
init_func:
mv x30, a1 # plic_claim
mv x31, a2 # isr_flag
la x17, _rv32i_plic_handle
mv a0, x17
li x29, TL2CDR_BASE
ret
//主站启动发送数据
//a1, 当前需要发送的数据的地址
//a2, 当前数据发送的长度
//a3, dummy
//a4, dummy
send_data_func:
mv REG_tx_data, a1
mv REG_tx_data_len, a2
//*tx0_txLen = 8 + tx_len; //前导+长度命令
mv x16, a2
addi x17, x16, 8
sw x17, TX0_WriteTxLen(REG_TL2CDR_BASE)
//*tx0_txFifo = (tx_len << 20) | (0 << 16) | 0x0000;
slli x17, x16, 20
sw x17, TX0_WriteTxFifo(REG_TL2CDR_BASE)
li a0, 1
ret
//设置接收数据的地址,第一个接收数据的长度，往后都是数据
//a1, 设置接收数据的缓冲区
set_recv_info_func:
mv REG_rx_data, a1
li a0, 1
ret
#if 0
slave_work_func:
1:
lw x18, (CDR_INT_RX0START * 4)(x31)
beqz x18, 1b
sw x0, (CDR_INT_RX0START * 4)(x31)
lw x20, RX0_ReadRxFifo(x29)
srli x19, x20, 20
addi x19, x19, 4
sw x19, TX1_WriteTxLen(x29)
sw x20, TX1_WriteTxFifo(x29)
li x21, 4
1:
lw x18, HLM_ReadStatus(x29)
andi x18, x18, HLM_RX0_VALID
beqz x18, 1b
lw x20, RX0_ReadRxFifo(x29)
sw x20, TX1_WriteTxFifo(x29)
addi x21, x21, 4
bltu x21, x19, 1b
ret
#else
slave_work_func:
1:
lw x18, HLM_ReadStatus(x29)
andi x19, x18, HLM_RX0_VALID
beqz x19, 1b
lw x20, RX0_ReadRxFifo(x29)
srli x19, x20, 20
addi x19, x19, 4
sw x19, TX1_WriteTxLen(x29)
sw x20, TX1_WriteTxFifo(x29)
li x21, 4
1:
lw x18, HLM_ReadStatus(x29)
andi x18, x18, HLM_RX0_VALID
beqz x18, 1b
lw x20, RX0_ReadRxFifo(x29)
sw x20, TX1_WriteTxFifo(x29)
addi x21, x21, 4
bltu x21, x19, 1b
ret
#endif
.balign 32
_rv32i_plic_handle:
lw x16, 0(x30) # x16 = *plic_claim
sw x16, 0(x30) # *plic_claim = x16
slli x17, x16, 2 # x17 = x17 * 4
add x17, x31, x17 # x17 = x31 + x17
li x16, 1
sw x16, 0(x17)
mret
#if 0
_prog_start:
//a0 call_function no
li x16, SYS_INIT
@@ -195,3 +319,4 @@ isr_hdl_table:
j isr_tx1_deq_hdl
j isr_rx0_enq_hdl
j isr_rx1_enq_hdl
#endif

4
tb/sw/src/mstStartup.S
View File

@@ -4,6 +4,7 @@
.extern int_svr_code
.extern plic_claim
.extern isr_flag
#ifdef __riscv_i
.extern plic_handle
@@ -58,6 +59,8 @@ _prog_start:
lui t0, %hi(plic_claim)
lw a1, %lo(plic_claim)(t0)
la a2, isr_flag
call int_svr_code
mv t0, a0 #这里选择不同的trap_entry服务函数,这个是RV32I的代码
#endif
@@ -74,7 +77,6 @@ _prog_start:
ecall
#ifdef __riscv_i
.extern isr_flag
.balign 32
trap_entry:
#.macro define_const name, value

4
tb/sw/src/slvStartup.S
View File

@@ -4,6 +4,7 @@
.extern main
.extern int_svr_code
.extern plic_claim
.extern isr_flag
.globl _prog_start
.section .text.init
@@ -51,6 +52,8 @@ _prog_start:
lui t0, %hi(plic_claim)
lw a1, %lo(plic_claim)(t0)
la a2, isr_flag
call int_svr_code
mv t0, a0 #这里选择不同的trap_entry服务函数,这个是RV32I的代码
#endif
@@ -69,7 +72,6 @@ _prog_start:
#ifdef __riscv_i
.extern isr_flag
.balign 32
trap_entry:
#.macro define_const name, value

216
tb/sw/src/slvSvr.S
View File

@@ -1,216 +0,0 @@
#include "tl2cdr.h"
#include "sysDef.h"
#if 0
/*
其他代码全部使用RV32E编译，仅此代码采用 RV32I 编译，故而可以使用x0, x16~x31寄存器
为了方便，不再使用ABI中的别名，直接使用x0, x16~x31；x1~x15使用ABI中定义的别名
x16~x23, 作为临时寄存器使用
x24, TL2CDR_BASE
x25, 接收数据的存储地址，第一个4字节接收数据的长度，往后都是数据
x26, 当前需要发送的数据的地址，第一个4个字节是长度(写入tx0_txLen)、第二开始是数据
x27, 需要发送的数据长度
x28, plic_claim的地址，用于读取当前正在服务的中断号，清除中断号
x29, REG_ISR_ADDR 中断服务子程序入口
x30, 最小的服务中断号
x31, 最大的服务中断号
*/
#endif
#define REG_TL2CDR_BASE x24
#define REG_rx_data x25
#define REG_tx_data x26
#define REG_tx_data_len x27
#define REG_plic_claim x28
#define REG_ISR_ADDR x29
#define REG_min_isr_num x30
#define REG_max_isr_num x31
#define REG_4 x23
.globl _prog_start
.globl _rv32i_plic_handle
.section .text.init, "ax", %progbits
_prog_start:
//a0 call_function no
li x16, SYS_INIT
beqz a0, init_system_func //初始化系统，输入必要的地址信息，返回 中断程序 的地址
li x16, SYS_SEND_DATA
beq a0, x16, send_data_func
li x16, SYS_SET_RECV_INFO
beq a0, x16, set_recv_info_func
10: j 10b //死循环，输入错误的功能号
ret //心理安慰，并不会返回
//初始化系统，输入必要的地址信息，返回中断程序的地址
//a1, plic_claim的地址, 其实也可以不用传送
init_system_func:
mv REG_plic_claim, a1 # plic_claim
la x17, _rv32i_plic_handle
mv a0, x17
li REG_TL2CDR_BASE, TL2CDR_BASE
la REG_ISR_ADDR, isr_hdl_table
li REG_min_isr_num, 14
li REG_max_isr_num, 25
li REG_4, 4
li x21, 0
ret
//主站启动发送数据
//完全依靠中断搬运
//a1, 当前需要发送的数据的地址
//a2, 当前数据发送的长度
//a3, dummy
//a4, dummy
send_data_func:
mv REG_tx_data, a1
mv REG_tx_data_len, a2
//*tx0_txLen = 8 + tx_len; //前导+长度命令
mv x16, a2
addi x17, x16, 8
sw x17, TX0_WriteTxLen(REG_TL2CDR_BASE)
//*tx0_txFifo = (tx_len << 20) | (0 << 16) | 0x0000;
slli x17, x16, 20
sw x17, TX0_WriteTxFifo(REG_TL2CDR_BASE)
//*tx0_txFifo = data[0]
#lw x17, 0(REG_tx_data)
#sw x17, TX0_WriteTxFifo(REG_TL2CDR_BASE)
#add REG_tx_data, REG_tx_data, REG_4
#sub REG_tx_data_len, REG_tx_data_len, REG_4
li a0, 1
ret
//设置接收数据的地址,第一个接收数据的长度，往后都是数据
//a1, 设置接收数据的缓冲区
set_recv_info_func:
mv REG_rx_data, a1
li a0, 1
ret
//--------------------------------------------
//这是中断程序开始的地方
.balign 32
_rv32i_plic_handle:
lw x16, 0(REG_plic_claim) # x16 = *plic_claim
sw x16, 0(REG_plic_claim) # *plic_claim = x16
bltu x16, REG_min_isr_num, exit_handle #if x16 < REG_min_isr_num then goto exit_handle
bltu REG_max_isr_num, x16, exit_handle #if REG_max_isr_num < x16 then goto exit_handle
sub x17, x16, REG_min_isr_num
slli x17, x17, 2 # x17 = x17 * 4
add x18, REG_ISR_ADDR, x17 # x18 = REG_ISR_ADDR + x17
jr x18
exit_handle:
mret
isr_tx0_end_hdl:
#li x17, 1
#sw x17, TX0_WriteSoftReset(REG_TL2CDR_BASE)
mret
isr_tx1_end_hdl:
#li x17, 1
#sw x17, TX0_WriteSoftReset(REG_TL2CDR_BASE)
mret
isr_rx0_err_hdl:
1: j 1b
mret
isr_rx1_err_hdl:
1: j 1b
mret
isr_rx0_start_hdl:
mret
isr_rx1_start_hdl:
#if 0
lw x22, RX1_ReadRxLen(REG_TL2CDR_BASE)
sw x22, 0(REG_rx_data)
add REG_rx_data, REG_rx_data, REG_4
#endif
mret
isr_rx0_end_hdl:
mret
isr_rx1_end_hdl:
mret
isr_tx0_deq_hdl:
#if 0
beqz REG_tx_data_len, 1f //if (REG_tx_data_len > 0)
lw x17, 0(REG_tx_data)
sw x17, TX0_WriteTxLen(REG_TL2CDR_BASE)
add REG_tx_data, REG_tx_data, REG_4
sub REG_tx_data_len, REG_tx_data_len, REG_4
1:
#endif
mret
isr_tx1_deq_hdl:
mret
isr_rx0_enq_hdl:
lw x17, RX0_ReadRxFifo(REG_TL2CDR_BASE)
bnez x21, 1f //if x21 != 0 then goto 1f
srli x16, x17, 20
add x16, x16, REG_4
mv x20, x16
add x16, x16, REG_4
sw x16, TX1_WriteTxLen(REG_TL2CDR_BASE)
1:
bge x21, x20, 1f
add x21, x21, REG_4
sw x17, TX1_WriteTxFifo(REG_TL2CDR_BASE)
1:
mret
isr_rx1_enq_hdl:
#if 0
lw x17, RX1_ReadRxFifo(REG_TL2CDR_BASE)
sw x17, 0(REG_rx_data)
add REG_rx_data, REG_rx_data, REG_4
#endif
mret
isr_hdl_table:
j isr_tx0_end_hdl
j isr_tx1_end_hdl
j isr_rx0_err_hdl
j isr_rx1_err_hdl
j isr_rx0_start_hdl
j isr_rx1_start_hdl
j isr_rx0_end_hdl
j isr_rx1_end_hdl
j isr_tx0_deq_hdl
j isr_tx1_deq_hdl
j isr_rx0_enq_hdl
j isr_rx1_enq_hdl

1
tb/sw/src/sysDef.h
View File

@@ -4,6 +4,7 @@
#define SYS_INIT 0
#define SYS_SEND_DATA 1
#define SYS_SET_RECV_INFO 2
#define SYS_SLAVE_WORK 3
#define WORKMODE_MASTER 0