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FSMC重构，使用100MHZ过采样

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This commit is contained in:
RuigeLee
2024-01-08 18:01:29 +08:00
parent b15cb7117c
commit d74a4754a7
4 changed files with 230 additions and 230 deletions
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41
src/main/verilog/backBoardMstTop.v
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@@ -12,21 +12,17 @@ module master_top(
output lvds_down_dout_p,
output lvds_down_dout_n,
input [15:0] io_FSMC_dataIn,
output [15:0] io_FSMC_dataOut,
output io_FSMC_dataOEn,
input io_FSMC_ce,
input io_FSMC_oe,
input io_FSMC_we,
input io_FSMC_adv,
output cdrErr ,
output crcErr ,
output linkErr,
output testDone,
output testFail
// input [9:0] io_FSMC_addr,
// input [15:0] io_FSMC_dataIn,
// output [15:0] io_FSMC_dataOut,
// output io_FSMC_dataOEn,
// input io_FSMC_cen,
// input io_FSMC_oen,
// input io_FSMC_wen
output linkErr
);
wire clk_400m;
@@ -129,13 +125,13 @@ CLKDIV Inst5_CLKDIVC(
BackBoardMst i_BackBoardMst(
// .io_FSMC_addr(io_FSMC_addr),
// .io_FSMC_dataIn(io_FSMC_dataIn),
// .io_FSMC_dataOut(io_FSMC_dataOut),
// .io_FSMC_dataOEn(io_FSMC_dataOEn),
// .io_FSMC_cen(io_FSMC_cen),
// .io_FSMC_oen(io_FSMC_oen),
// .io_FSMC_wen(io_FSMC_wen),
.io_FSMC_dataIn(io_FSMC_dataIn),
.io_FSMC_dataOut(io_FSMC_dataOut),
.io_FSMC_dataOEn(io_FSMC_dataOEn),
.io_FSMC_ce(io_FSMC_ce),
.io_FSMC_oe(io_FSMC_oe),
.io_FSMC_we(io_FSMC_we),
.io_FSMC_adv(io_FSMC_adv),
.reset(~rst_n),
.clock(clk_10m_a),
@@ -150,10 +146,7 @@ BackBoardMst i_BackBoardMst(
.io_cdrErr (cdrErr),
.io_crcErr (crcErr),
.io_linkErr(linkErr),
.io_testDone(testDone),
.io_testFail(testFail)
.io_linkErr(linkErr)
);