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断言不会发生tx Underrun

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This commit is contained in:
RuigeLee
2023-10-13 15:21:53 +08:00
parent bb35dffb84
commit ceef60b95c
4 changed files with 53 additions and 78 deletions
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6
src/main/scala/mac/MAC.scala
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@@ -125,7 +125,6 @@ val TxUsedData = Wire(Bool())
val TxData = Wire(UInt(8.W))
val TxRetry = Wire(Bool())
val TxAbort = Wire(Bool())
val TxUnderRun = Wire(Bool())
val TxDone = Wire(Bool())
val TPauseRq = Wire(Bool())
@@ -135,7 +134,6 @@ dontTouch(TxUsedData)
dontTouch(TxData )
dontTouch(TxRetry )
dontTouch(TxAbort )
dontTouch(TxUnderRun)
dontTouch(TxDone )
dontTouch(TPauseRq )
@@ -512,7 +510,6 @@ val txethmac = withClockAndReset(io.mtx_clk_pad_i.asClock, io.asyncReset)( Modul
txethmac.io.TxStartFrm := TxStartFrmOut
txethmac.io.TxEndFrm := TxEndFrmOut
txethmac.io.TxUnderRun := TxUnderRun
txethmac.io.TxData := TxDataOut
txethmac.io.CarrierSense := TxCarrierSense
txethmac.io.Collision := Collision
@@ -817,9 +814,6 @@ val rxethmac = withClockAndReset(io.mrx_clk_pad_i.asClock, io.asyncReset)( Modul
TxEndFrm := macTileLinkTx.io.TxEndFrm
TxData := macTileLinkTx.io.TxData
wishbone.io.TxUnderRun := TxUnderRun
TxUnderRun := macTileLinkTx.io.TxUnderRun
macTileLinkTx.io.TxUnderRun_wb := wishbone.io.TxUnderRun_wb
macTileLinkTx.io.TxData_wb := wishbone.io.TxData_wb
macTileLinkTx.io.TxValidBytesLatched := wishbone.io.TxValidBytesLatched