smUnit的fifo断言变为条件

This commit is contained in:
Ruige Lee
2025-06-27 09:43:53 +08:00
parent aa73bb3d99
commit ca434eef06

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@@ -48,14 +48,14 @@ abstract class SMUnitBase(depth: Int = 4) extends Module {
val isEmpty = ( wPtr === rPtr ) val isEmpty = ( wPtr === rPtr )
when( io.enq ){ when( io.enq & ~isFull ){
wPtr := wPtr + 1.U wPtr := wPtr + 1.U
assert( ~isFull) // assert( ~isFull)
} }
when( io.deq ){ when( io.deq & ~isEmpty ){
rPtr := rPtr + 1.U rPtr := rPtr + 1.U
assert( ~isEmpty ) // assert( ~isEmpty )
} }
for( i <- 0 until depth ){ for( i <- 0 until depth ){