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合并bacon_dev分支的修改：1.增加寻找超出指定执行周期的指令；2.删除汇编中不需要的代码；3.增加协议的细节内容

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This commit is contained in:
bacon
2025-03-03 10:59:07 +08:00
parent 7f123244be
commit c64df6956d
4 changed files with 95 additions and 306 deletions
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19
tb/sw/src/check_custom_ins.py
View File

@@ -42,6 +42,20 @@ def search_custom_inst(logdata, opcode, funct, xd = 0, xs1 = 0, xs2 = 0, xd_filt
else:
pass
def search_ins_cycle_gt(logdata, s_cycle):
lines = logdata
prev_line = None
prev_time = 0
for line in lines:
line = line.rstrip()
cur_time = re.findall(r"C0:[\ \d]{11}", line)
cur_time = int(cur_time[0][3:])
deltime = cur_time - prev_time
if (deltime >= s_cycle) and (prev_line != None):
print(f'T:{deltime}', prev_line)
prev_time = cur_time
prev_line = line
def get_bit_pos(val):
bits_pos = list()
@@ -65,9 +79,12 @@ if __name__ == '__main__':
with open(logfile_path, 'rt') as logfile:
logdata = logfile.readlines()
filter = 1<<7
search_ins_cycle_gt(logdata, 2)
'''
filter = (1<<7)
print(f'custom0-ins: clear roccs int flag, bit filter:', get_bit_pos(filter))
search_custom_inst(logdata, 0xb, 0x17, xs1=1, xs1_filter=filter)
'''
'''
filter = (1<<10) | (1 << 7) | (1 << 2) | (1 << 1)

68
tb/sw/src/halfLvdsMacSvr.c
View File

@@ -66,17 +66,6 @@ uint32_t HLM_poll(uint32_t mode)
tx_data_ptr[1] = MAGIC_NUM;
}
else if (seq == 1)
{
is_tx_crc = 1;
is_rx_crc = 1;
tx_pkt_len = 320 + 4;
tx_data_ptr[0] = ((tx_pkt_len - 4) << 20) | 2;
for (i = 4; i < (tx_pkt_len - 4 * is_tx_crc); i++)
MST_TX_BUF[i] = i;
}
else
{
is_tx_crc = 1;
is_rx_crc = 1;
@@ -89,7 +78,17 @@ uint32_t HLM_poll(uint32_t mode)
tx_data_ptr[3] = 0; //delta time
tx_data_ptr[4] = 0; //ctr | dev_num
//tx_data_ptr[5] = 0; //crc
}
else
{
is_tx_crc = 1;
is_rx_crc = 1;
tx_pkt_len = 320 + 4;
tx_data_ptr[0] = ((tx_pkt_len - 4) << 20) | 0;
for (i = 4; i < (tx_pkt_len - 4 * is_tx_crc); i++)
MST_TX_BUF[i] = i;
}
//开始发送工作
@@ -100,12 +99,13 @@ uint32_t HLM_poll(uint32_t mode)
uint32_t tx_len;
tx_len = is_tx_crc? (tx_pkt_len - 4):tx_pkt_len;
tx_len = tx_len >> 2;
//i_tx0_clear_timer(0);
for (i = 0; i < HLM_TX_FIFO_LEN; i++)
{
if ((tx_index * 4) < tx_len)
if (tx_index < tx_len)
{
i_tx0_txFifo(tx_data_ptr[tx_index]);
tx_index++;
@@ -130,20 +130,19 @@ uint32_t HLM_poll(uint32_t mode)
//i_tx1_softReset(1);
i_hlm_status(status);
i_hlm_read_intflag(intflag);
i_hlm_clear_intflag(intflag);
tx_times = HLM_TX_FIFO_LEN - HLM_TX0_FIFO_LEFT(status);
for (i = 0; i < tx_times; i++)
{
if ((tx_index * 4) < tx_len)
if (tx_index < tx_len)
{
i_tx0_txFifo(tx_data_ptr[tx_index]);
tx_index++;
}
else
{
if (is_tx_crc && ((tx_index * 4) == tx_len))
if (is_tx_crc && (tx_index == tx_len))
{
uint32_t crc;
i_tx0_txCrc(crc);
@@ -154,12 +153,13 @@ uint32_t HLM_poll(uint32_t mode)
}
}
i_hlm_clear_intflag(intflag);
for (i = 0; i < HLM_RX1_FIFO_LEFT(status); i++)
{
if (rx_start)
{
if ((rx_pkt_len - 4) == (rx_index * 4))
if ((rx_pkt_len - 1) == rx_index)
{
uint32_t crc;
i_rx1_rxCrc(crc);
@@ -176,11 +176,12 @@ uint32_t HLM_poll(uint32_t mode)
if (rx_index == 0)
{
rx_pkt_len = (rx_data_ptr[rx_index] >> 20) + 4;
rx_pkt_len = rx_pkt_len >> 2;
}
rx_index++;
if (rx_pkt_len < (rx_index * 4))
if (rx_pkt_len < rx_index)
{
rx_start = 0;
rx_index = 0;
@@ -207,7 +208,7 @@ uint32_t HLM_poll(uint32_t mode)
if (seq == 0)
{
if ((rx_pkt_len == 8) && ((rx_data_ptr[0] & 0xff) == 0x1) && (rx_data_ptr[1] == MAGIC_NUM))
if ((rx_pkt_len == 2) && ((rx_data_ptr[0] & 0xff) == 0x1) && (rx_data_ptr[1] == MAGIC_NUM))
{
seq = 1;
}
@@ -266,10 +267,6 @@ uint32_t HLM_slave_poll(void)
stamp_time = 0; //read_mtimer();
#ifdef __riscv_e
sys_call(SYS_SLAVE_WORK);
#else
while (1)
{
if (is_terminal)
@@ -382,8 +379,6 @@ uint32_t HLM_slave_poll(void)
}
}
#endif
}
@@ -410,7 +405,7 @@ uint32_t HLM_slave_1stream_poll(uint32_t protocol, uint32_t data, uint32_t is_cr
{
i_hlm_status(hlm_status);
i_hlm_read_intflag(intflag);
i_hlm_clear_intflag(intflag);
for (i = 0; i < HLM_RX0_FIFO_LEFT(hlm_status); i++)
{
@@ -423,10 +418,21 @@ uint32_t HLM_slave_1stream_poll(uint32_t protocol, uint32_t data, uint32_t is_cr
if (d_rx_pkt_len > (d_rx_index * 4))
{
if ((d_rx_pkt_len - 4) == (d_rx_index * 4))
{
if (protocol == 2)
{
uint32_t ctr = (data >> 16) & 0xffff;
ctr++;
data = (ctr << 16) | (data & 0xffff);
}
}
i_tx1_txFifo(data);
}
else if (d_rx_pkt_len == (d_rx_index * 4))
{
if (protocol == 2)
i_tx1_txCrc(data);
i_tx1_txFifo(data);
}
else
@@ -440,6 +446,8 @@ uint32_t HLM_slave_1stream_poll(uint32_t protocol, uint32_t data, uint32_t is_cr
break;
}
i_hlm_clear_intflag(intflag);
if (intflag & HLM_INT_TX1_END)
{
i_rx0_softReset(1);
@@ -461,10 +469,17 @@ uint32_t HLM_slave_1stream_poll(uint32_t protocol, uint32_t data, uint32_t is_cr
index++;\
if (pkt_len > (index))\
{\
if ((pkt_len - 1) == index)\
{\
uint32_t ctr = (data >> 16) & 0xffff;\
ctr++;\
data = (ctr << 16) | (data & 0xffff);\
}\
i_tx0_txFifo(data);\
}\
else if (pkt_len == (index))\
{\
i_tx0_txCrc(data);\
i_tx0_txFifo(data);\
}\
else\
@@ -535,7 +550,6 @@ uint32_t HLM_slave_2streams_poll(uint32_t protocol, uint32_t data, uint32_t is_c
{
i_hlm_status(hlm_status);
i_hlm_read_intflag(intflag);
i_hlm_clear_intflag(intflag);
HLM_Slave_2streams_down_poll(downstream_work,
d_rx_index,
@@ -543,6 +557,8 @@ uint32_t HLM_slave_2streams_poll(uint32_t protocol, uint32_t data, uint32_t is_c
intflag,
hlm_status);
i_hlm_clear_intflag(intflag);
if (intflag & HLM_INT_RX1_START)
{
upstream_work = 1;

287
tb/sw/src/hlmSvrOpt.S
View File

@@ -6,42 +6,13 @@
/*
其他代码全部使用RV32E编译，仅此代码采用 RV32I 编译，故而可以使用x0, x16~x31寄存器
为了方便，不再使用ABI中的别名，直接使用x0, x16~x31；x1~x15使用ABI中定义的别名
x16~x23, 作为临时寄存器使用
x24, TL2CDR_BASE
x25, 接收数据的存储地址，第一个4字节接收数据的长度，往后都是数据
x26, 当前需要发送的数据的地址，第一个4个字节是长度(写入tx0_txLen)、第二开始是数据
x27, 需要发送的数据长度
x28, plic_claim的地址，用于读取当前正在服务的中断号，清除中断号
x29, REG_ISR_ADDR 中断服务子程序入口
x30, 最小的服务中断号
x31, 最大的服务中断号
*/
#endif
#ifndef __riscv_i
#if !(defined(__riscv_i) || defined(__USE_RV32I_ABI))
#error "must be compiled in RV32I"
#endif
#define REG_TL2CDR_BASE x24
#define REG_rx_data x25
#define REG_tx_data x26
#define REG_tx_data_len x27
#define REG_plic_claim x28
#define REG_ISR_ADDR x29
#define REG_min_isr_num x30
#define REG_max_isr_num x31
#define REG_4 x23
.globl _prog_start
.globl _rv32i_plic_handle
@@ -64,277 +35,79 @@ _prog_start:
ret //心理安慰，并不会返回
//初始化系统，输入必要的地址信息，返回中断程序的地址
//a1, plic_claim的地址, 其实也可以不用传送
init_func:
mv x30, a1 # plic_claim
mv x31, a2 # isr_flag
la x17, _rv32i_plic_handle
mv a0, x17
//---------------------------------------------------------
//a1~a5
//li x29, TL2CDR_BASE
hlm_slave_work:
li x18, 1
i_rx0_txPair(x18)
i_rx0_limitTime(x0)
i_rx1_txPair(x0)
i_rx1_limitTime(x0)
1:
i_hlm_read_intflag(x17)
i_hlm_status(x16)
andi x18, x17, HLM_INT_RX0_START
ret
//---------------------------------------------------------
//初始化系统，输入必要的地址信息，返回中断程序的地址
//a1, plic_claim的地址, 其实也可以不用传送
init_func:
ret
//---------------------------------------------------------
//主站启动发送数据
//a1, 当前需要发送的数据的地址
//a2, 当前数据发送的长度
//a3, dummy
//a4, dummy
send_data_func:
mv REG_tx_data, a1
mv REG_tx_data_len, a2
//*tx0_txLen = 8 + tx_len; //前导+长度命令
mv x16, a2
addi x17, x16, 8
//sw x17, TX0_WriteTxLen(REG_TL2CDR_BASE)
i_tx0_txLen(x17)
//*tx0_txFifo = (tx_len << 20) | (0 << 16) | 0x0000;
slli x17, x16, 20
//sw x17, TX0_WriteTxFifo(REG_TL2CDR_BASE)
i_tx0_txFifo(x17)
li a0, 1
#warning ..................................................
ret
//---------------------------------------------------------
//设置接收数据的地址,第一个接收数据的长度，往后都是数据
//a1, 设置接收数据的缓冲区
set_recv_info_func:
mv REG_rx_data, a1
li a0, 1
ret
#if 0
slave_work_func:
1:
lw x18, (CDR_INT_RX0START * 4)(x31)
beqz x18, 1b
sw x0, (CDR_INT_RX0START * 4)(x31)
lw x20, RX0_ReadRxFifo(x29)
srli x19, x20, 20
addi x19, x19, 4
sw x19, TX1_WriteTxLen(x29)
sw x20, TX1_WriteTxFifo(x29)
li x21, 4
1:
lw x18, HLM_ReadStatus(x29)
andi x18, x18, HLM_RX0_VALID
beqz x18, 1b
lw x20, RX0_ReadRxFifo(x29)
sw x20, TX1_WriteTxFifo(x29)
addi x21, x21, 4
bltu x21, x19, 1b
ret
#else
slave_work_func:
1:
//lw x18, HLM_ReadStatus(x29)
i_hlm_status(x18)
andi x19, x18, HLM_RX0_VALID
beqz x19, 1b
//lw x20, RX0_ReadRxFifo(x29)
i_rx0_rxFifo(x20)
srli x19, x20, 20
addi x19, x19, 4
//sw x19, TX1_WriteTxLen(x29)
i_tx1_txLen(x29)
//sw x20, TX1_WriteTxFifo(x29)
i_tx1_txFifo(x29)
li x21, 4
1:
//lw x18, HLM_ReadStatus(x29)
i_hlm_status(x29)
andi x18, x18, HLM_RX0_VALID
beqz x18, 1b
//lw x20, RX0_ReadRxFifo(x29)
i_rx0_rxFifo(x29)
//sw x20, TX1_WriteTxFifo(x29)
i_tx1_txFifo(x29)
addi x21, x21, 4
bltu x21, x19, 1b
ret
#endif
.balign 32
_rv32i_plic_handle:
lw x16, 0(x30) # x16 = *plic_claim
sw x16, 0(x30) # *plic_claim = x16
slli x17, x16, 2 # x17 = x17 * 4
add x17, x31, x17 # x17 = x31 + x17
li x16, 1
sw x16, 0(x17)
mret
#if 0
_prog_start:
//a0 call_function no
li x16, SYS_INIT
beqz a0, init_system_func //初始化系统，输入必要的地址信息，返回 中断程序 的地址
li x16, SYS_SEND_DATA
beq a0, x16, send_data_func
li x16, SYS_SET_RECV_INFO
beq a0, x16, set_recv_info_func
10: j 10b //死循环，输入错误的功能号
ret //心理安慰，并不会返回
//初始化系统，输入必要的地址信息，返回中断程序的地址
//a1, plic_claim的地址, 其实也可以不用传送
init_system_func:
mv REG_plic_claim, a1 # plic_claim
la x17, _rv32i_plic_handle
mv a0, x17
li REG_TL2CDR_BASE, TL2CDR_BASE
la REG_ISR_ADDR, isr_hdl_table
li REG_min_isr_num, 14
li REG_max_isr_num, 25
li REG_4, 4
ret
//主站启动发送数据
//a1, 当前需要发送的数据的地址
//a2, 当前数据发送的长度
//a3, dummy
//a4, dummy
send_data_func:
mv REG_tx_data, a1
mv REG_tx_data_len, a2
//*tx0_txLen = 8 + tx_len; //前导+长度命令
mv x16, a2
addi x17, x16, 8
//sw x17, TX0_WriteTxLen(REG_TL2CDR_BASE)
i_tx0_txLen(x17)
//*tx0_txFifo = (tx_len << 20) | (0 << 16) | 0x0000;
slli x17, x16, 20
//sw x17, TX0_WriteTxFifo(REG_TL2CDR_BASE)
i_tx0_txFifo(x17)
//*tx0_txFifo = data[0]
#lw x17, 0(REG_tx_data)
#sw x17, TX0_WriteTxFifo(REG_TL2CDR_BASE)
#add REG_tx_data, REG_tx_data, REG_4
#sub REG_tx_data_len, REG_tx_data_len, REG_4
li a0, 1
ret
//设置接收数据的地址,第一个接收数据的长度，往后都是数据
//a1, 设置接收数据的缓冲区
//---------------------------------------------------------
set_recv_info_func:
mv REG_rx_data, a1
li a0, 1
ret
//--------------------------------------------
//这是中断程序开始的地方
//---------------------------------------------------------
//中断程序,没有使用
.balign 32
_rv32i_plic_handle:
lw x16, 0(REG_plic_claim) # x16 = *plic_claim
sw x16, 0(REG_plic_claim) # *plic_claim = x16
bltu x16, REG_min_isr_num, exit_handle #if x16 < REG_min_isr_num then goto exit_handle
bltu REG_max_isr_num, x16, exit_handle #if REG_max_isr_num < x16 then goto exit_handle
sub x17, x16, REG_min_isr_num
slli x17, x17, 2 # x17 = x17 * 4
add x18, REG_ISR_ADDR, x17 # x18 = REG_ISR_ADDR + x17
jr x18
exit_handle:
mret
isr_tx0_end_hdl:
#li x17, 1
#sw x17, TX0_WriteSoftReset(REG_TL2CDR_BASE)
//i_tx0_softReset(x17)
mret
isr_tx1_end_hdl:
#li x17, 1
#sw x17, TX1_WriteSoftReset(REG_TL2CDR_BASE)
//i_tx1_softReset(x17)
mret
isr_rx0_err_hdl:
mret
isr_rx1_err_hdl:
mret
isr_rx0_start_hdl:
mret
isr_rx1_start_hdl:
//lw x22, RX1_ReadRxLen(REG_TL2CDR_BASE)
i_rx1_rxLen(x22)
sw x22, 0(REG_rx_data)
add REG_rx_data, REG_rx_data, REG_4
mret
isr_rx0_end_hdl:
mret
isr_rx1_end_hdl:
mret
isr_tx0_deq_hdl:
beqz REG_tx_data_len, 1f //if (REG_tx_data_len > 0)
lw x17, 0(REG_tx_data)
//sw x17, TX0_WriteTxFifo(REG_TL2CDR_BASE)
i_tx0_txFifo(x17)
add REG_tx_data, REG_tx_data, REG_4
sub REG_tx_data_len, REG_tx_data_len, REG_4
1:
mret
isr_tx1_deq_hdl:
mret
isr_rx0_enq_hdl:
mret
isr_rx1_enq_hdl:
//lw x17, RX1_ReadRxFifo(REG_TL2CDR_BASE)
i_rx1_rxFifo(x17)
sw x17, 0(REG_rx_data)
//add REG_rx_data, REG_rx_data, REG_4
mret
isr_hdl_table:
j isr_tx0_end_hdl
j isr_tx1_end_hdl
j isr_rx0_err_hdl
j isr_rx1_err_hdl
j isr_rx0_start_hdl
j isr_rx1_start_hdl
j isr_rx0_end_hdl
j isr_rx1_end_hdl
j isr_tx0_deq_hdl
j isr_tx1_deq_hdl
j isr_rx0_enq_hdl
j isr_rx1_enq_hdl
#endif

21
tb/sw/src/startup.S
View File

@@ -8,10 +8,6 @@
.extern exti_isr_flag
.extern mtimer_int_flag
#ifdef __riscv_i
.extern plic_handle
#endif
.globl _prog_start
.section .text.init
@@ -32,7 +28,7 @@ _prog_start:
li x13, 0
li x14, 0
li x15, 0
#ifdef __riscv_i
#if defined(__riscv_i) || defined(__USE_RV32I_ABI)
li x16, 0
li x17, 0
li x18, 0
@@ -56,19 +52,8 @@ _prog_start:
la sp, sys_stack
add sp, sp, t0
#ifdef __riscv_i
la t0, trap_entry
#else
li a0, 0
lui t0, %hi(plic_claim)
lw a1, %lo(plic_claim)(t0)
la a2, exti_isr_flag
call int_svr_code
mv t0, a0 #这里选择不同的trap_entry服务函数,这个是RV32I的代码
#endif
csrw mtvec, t0
li t0, (1 << 11) //| (1 << 13) //13bit是rocc的中断
csrw mie, t0
@@ -81,7 +66,6 @@ _prog_start:
ecall
#ifdef __riscv_i
.balign 32
trap_entry:
#.macro define_const name, value
@@ -90,7 +74,6 @@ trap_entry:
## 使用宏定义常量
#define_const CDR_INT_TXEND, 14
opt_trap_entry:
addi sp,sp,136
#sw ra,4(sp)
@@ -166,6 +149,7 @@ exti_isr:
#lw sp,8(sp)
#lw gp,12(sp)
#lw tp,16(sp)
rocc_isr:
//add rocc interrupt here
i_hlm_read_intflag(t0)
@@ -221,4 +205,3 @@ isr_j_table:
j rocc_isr # d jump to unknown_isr
1: j 1b # e jump to unknown_isr
1: j 1b # f jump to unknown_isr
#endif