汇编模式建立
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RuigeLee
102
tb/sw/src/custom_ops.S
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102
tb/sw/src/custom_ops.S
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@@ -0,0 +1,102 @@
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// This is free and unencumbered software released into the public domain.
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//
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// Anyone is free to copy, modify, publish, use, compile, sell, or
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// distribute this software, either in source code form or as a compiled
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// binary, for any purpose, commercial or non-commercial, and by any
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// means.
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#define regnum_q0 0
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#define regnum_q1 1
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#define regnum_q2 2
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#define regnum_q3 3
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#define regnum_x0 0
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#define regnum_x1 1
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#define regnum_x2 2
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#define regnum_x3 3
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#define regnum_x4 4
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#define regnum_x5 5
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#define regnum_x6 6
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#define regnum_x7 7
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#define regnum_x8 8
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#define regnum_x9 9
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#define regnum_x10 10
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#define regnum_x11 11
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#define regnum_x12 12
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#define regnum_x13 13
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#define regnum_x14 14
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#define regnum_x15 15
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#define regnum_x16 16
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#define regnum_x17 17
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#define regnum_x18 18
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#define regnum_x19 19
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#define regnum_x20 20
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#define regnum_x21 21
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#define regnum_x22 22
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#define regnum_x23 23
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#define regnum_x24 24
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#define regnum_x25 25
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#define regnum_x26 26
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#define regnum_x27 27
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#define regnum_x28 28
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#define regnum_x29 29
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#define regnum_x30 30
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#define regnum_x31 31
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#define regnum_zero 0
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#define regnum_ra 1
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#define regnum_sp 2
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#define regnum_gp 3
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#define regnum_tp 4
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#define regnum_t0 5
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#define regnum_t1 6
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#define regnum_t2 7
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#define regnum_s0 8
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#define regnum_s1 9
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#define regnum_a0 10
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#define regnum_a1 11
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#define regnum_a2 12
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#define regnum_a3 13
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#define regnum_a4 14
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#define regnum_a5 15
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#define regnum_a6 16
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#define regnum_a7 17
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#define regnum_s2 18
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#define regnum_s3 19
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#define regnum_s4 20
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#define regnum_s5 21
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#define regnum_s6 22
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#define regnum_s7 23
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#define regnum_s8 24
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#define regnum_s9 25
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#define regnum_s10 26
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#define regnum_s11 27
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#define regnum_t3 28
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#define regnum_t4 29
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#define regnum_t5 30
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#define regnum_t6 31
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// x8 is s0 and also fp
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#define regnum_fp 8
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#define r_type_insn(_f7, _rs2, _rs1, _f3, _rd, _opc) \
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.word (((_f7) << 25) | ((_rs2) << 20) | ((_rs1) << 15) | ((_f3) << 12) | ((_rd) << 7) | ((_opc) << 0))
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#define picorv32_getq_insn(_rd, _qs) \
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r_type_insn(0b0000000, 0, regnum_ ## _qs, 0b100, regnum_ ## _rd, 0b0001011)
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#define picorv32_setq_insn(_qd, _rs) \
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r_type_insn(0b0000001, 0, regnum_ ## _rs, 0b010, regnum_ ## _qd, 0b0001011)
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#define picorv32_retirq_insn() \
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r_type_insn(0b0000010, 0, 0, 0b000, 0, 0b0001011)
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#define picorv32_maskirq_insn(_rd, _rs) \
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r_type_insn(0b0000011, 0, regnum_ ## _rs, 0b110, regnum_ ## _rd, 0b0001011)
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#define picorv32_waitirq_insn(_rd) \
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r_type_insn(0b0000100, 0, 0, 0b100, regnum_ ## _rd, 0b0001011)
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#define picorv32_timer_insn(_rd, _rs) \
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r_type_insn(0b0000101, 0, regnum_ ## _rs, 0b110, regnum_ ## _rd, 0b0001011)
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47
tb/sw/src/main.S
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47
tb/sw/src/main.S
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@@ -0,0 +1,47 @@
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#define cdr_0_tx_status 0x40000000
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#define cdr_0_tx_txLen 0x40000004
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#define cdr_0_tx_txFifo 0x40000008
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#define cdr_0_rx_softReset 0x40000010
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#define cdr_0_rx_status 0x40000014
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#define cdr_0_rx_rxLen 0x40000018
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#define cdr_0_rx_rxFifo 0x4000001c
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#define cdr_1_tx_status 0x40000080
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#define cdr_1_tx_txLen 0x40000084
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#define cdr_1_tx_txFifo 0x40000088
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#define cdr_1_rx_softReset 0x40000090
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#define cdr_1_rx_status 0x40000094
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#define cdr_1_rx_rxLen 0x40000098
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#define cdr_1_rx_rxFifo 0x4000009c
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.global main
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main:
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lui x5, %hi(cdr_0_tx_status)
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li x6, 128
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sw x6, 4(x5) #cdr_0_tx_txLen
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li x6, 32 # 设置循环次数
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1:
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beqz x15, 2f # 如果x10为0，则跳到2
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lw x7, 0(x5) # 读取cdr_0_tx_status的值
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andi x7, x7, 0x2 # 检查第1比特（位1）
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beqz x7, 1b # 如果第1比特为0，则回到1处继续循环
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2:
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# 向cdr_0_tx_txFifo地址写入0x55，循环32次
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sw x6, 8(x5) # 向cdr_0_tx_txFifo写入0x55
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addi x6, x6, -1 # 递减计数器
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bnez x6, 1b # 如果计数器不为0，则继续循环
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3:
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j 3b
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@@ -1,6 +1,198 @@
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.section .text.init
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.globl _prog_start
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#include "custom_ops.S"
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.section .text
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.globl _prog_start
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.global irq
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.extern main
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/* Interrupt handler
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**********************************/
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.balign 16
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irq_vec:
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/* save registers */
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picorv32_setq_insn(q2, x1)
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picorv32_setq_insn(q3, x2)
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lui x1, %hi(irq_regs)
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addi x1, x1, %lo(irq_regs)
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picorv32_getq_insn(x2, q0)
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sw x2, 0*4(x1)
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picorv32_getq_insn(x2, q2)
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sw x2, 1*4(x1)
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picorv32_getq_insn(x2, q3)
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sw x2, 2*4(x1)
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#ifdef ENABLE_FASTIRQ
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sw x5, 5*4(x1)
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sw x6, 6*4(x1)
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sw x7, 7*4(x1)
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sw x10, 10*4(x1)
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sw x11, 11*4(x1)
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sw x12, 12*4(x1)
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sw x13, 13*4(x1)
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sw x14, 14*4(x1)
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sw x15, 15*4(x1)
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sw x16, 16*4(x1)
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sw x17, 17*4(x1)
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sw x28, 28*4(x1)
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sw x29, 29*4(x1)
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sw x30, 30*4(x1)
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sw x31, 31*4(x1)
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#else
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sw x3, 3*4(x1)
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sw x4, 4*4(x1)
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sw x5, 5*4(x1)
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sw x6, 6*4(x1)
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sw x7, 7*4(x1)
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sw x8, 8*4(x1)
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sw x9, 9*4(x1)
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sw x10, 10*4(x1)
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sw x11, 11*4(x1)
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sw x12, 12*4(x1)
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sw x13, 13*4(x1)
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sw x14, 14*4(x1)
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sw x15, 15*4(x1)
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sw x16, 16*4(x1)
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sw x17, 17*4(x1)
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sw x18, 18*4(x1)
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sw x19, 19*4(x1)
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sw x20, 20*4(x1)
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sw x21, 21*4(x1)
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sw x22, 22*4(x1)
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sw x23, 23*4(x1)
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sw x24, 24*4(x1)
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sw x25, 25*4(x1)
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sw x26, 26*4(x1)
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sw x27, 27*4(x1)
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sw x28, 28*4(x1)
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sw x29, 29*4(x1)
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sw x30, 30*4(x1)
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sw x31, 31*4(x1)
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#endif
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/* call interrupt handler C function */
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lui sp, %hi(irq_stack)
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addi sp, sp, %lo(irq_stack)
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// arg0 = address of regs
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lui a0, %hi(irq_regs)
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addi a0, a0, %lo(irq_regs)
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// arg1 = interrupt type
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picorv32_getq_insn(a1, q1)
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// call to C function
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# jal ra, irq
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/* restore registers */
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// new irq_regs address returned from C code in a0
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addi x1, a0, 0
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lw x2, 0*4(x1)
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picorv32_setq_insn(q0, x2)
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lw x2, 1*4(x1)
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picorv32_setq_insn(q1, x2)
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lw x2, 2*4(x1)
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picorv32_setq_insn(q2, x2)
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#ifdef ENABLE_FASTIRQ
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lw x5, 5*4(x1)
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lw x6, 6*4(x1)
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lw x7, 7*4(x1)
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lw x10, 10*4(x1)
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lw x11, 11*4(x1)
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lw x12, 12*4(x1)
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lw x13, 13*4(x1)
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lw x14, 14*4(x1)
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lw x15, 15*4(x1)
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lw x16, 16*4(x1)
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lw x17, 17*4(x1)
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lw x28, 28*4(x1)
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lw x29, 29*4(x1)
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lw x30, 30*4(x1)
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lw x31, 31*4(x1)
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#else
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lw x3, 3*4(x1)
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lw x4, 4*4(x1)
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lw x5, 5*4(x1)
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lw x6, 6*4(x1)
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lw x7, 7*4(x1)
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lw x8, 8*4(x1)
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lw x9, 9*4(x1)
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lw x10, 10*4(x1)
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lw x11, 11*4(x1)
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lw x12, 12*4(x1)
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lw x13, 13*4(x1)
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lw x14, 14*4(x1)
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lw x15, 15*4(x1)
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lw x16, 16*4(x1)
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lw x17, 17*4(x1)
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lw x18, 18*4(x1)
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lw x19, 19*4(x1)
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lw x20, 20*4(x1)
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lw x21, 21*4(x1)
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lw x22, 22*4(x1)
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lw x23, 23*4(x1)
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lw x24, 24*4(x1)
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lw x25, 25*4(x1)
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lw x26, 26*4(x1)
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lw x27, 27*4(x1)
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lw x28, 28*4(x1)
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lw x29, 29*4(x1)
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lw x30, 30*4(x1)
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lw x31, 31*4(x1)
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#endif
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picorv32_getq_insn(x1, q1)
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picorv32_getq_insn(x2, q2)
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picorv32_retirq_insn()
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.balign 0x200
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irq_regs:
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// registers are saved to this memory region during interrupt handling
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// the program counter is saved as register 0
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.fill 32,4
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// stack for the interrupt handler
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.fill 128,4
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irq_stack:
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_prog_start:
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li x1, 0
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@@ -35,18 +227,8 @@ _prog_start:
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li x30,0
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li x31,0
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# li t0, 0xffff
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# csrc mie, t0
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# li t0, 0xa
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# csrc mstatus, t0
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li sp, 0x80010000
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# la t0, trap_entry
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# csrw mtvec, t0
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call main
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@@ -91,7 +273,7 @@ trap_entry:
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# csrr a0, mcause
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# csrr a1, mepc
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mv a2, sp
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jal handle_trap
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# jal handle_trap
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# csrw mepc, a0
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