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增加代码,调整了spi_1_to_4协议的时序,解决了部分bug

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bacon
2026-02-14 09:04:32 +08:00
parent 44b7aa2a5d
commit bec9dc12c2
2 changed files with 19 additions and 16 deletions
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23
tb/shinTest/ShinTopSpiTb.v
View File

@@ -446,8 +446,8 @@ begin
`ifdef VCS_COMPILE `ifdef VCS_COMPILE
$dumpfile("./generated/wave.vcd"); //生成的vcd文件名称 $dumpfile("./generated/wave.vcd"); //生成的vcd文件名称
//$dumpvars(0, ShinTopSpiTb);//tb模块名称 $dumpvars(0, ShinTopSpiTb);//tb模块名称
$dumpvars(0, ShinTopSpiTb.s_ShinTop_Mst);//tb模块名称 //$dumpvars(0, ShinTopSpiTb.s_ShinTop_Mst);//tb模块名称
//$dumpvars(0, ShinTopSpiTb.s_ShinTop_slv124);//tb模块名称 //$dumpvars(0, ShinTopSpiTb.s_ShinTop_slv124);//tb模块名称
//$dumpvars(0, ShinTopSpiTb.s_ShinTop_slv125);//tb模块名称 //$dumpvars(0, ShinTopSpiTb.s_ShinTop_slv125);//tb模块名称
//$dumpvars(0, ShinTopSpiTb.s_ShinTop_slv126);//tb模块名称 //$dumpvars(0, ShinTopSpiTb.s_ShinTop_slv126);//tb模块名称
@@ -495,12 +495,12 @@ end
reg [16:0] idx; reg [16:0] idx;
`ifndef OLD_SPI_SUPPORT `ifndef OLD_SPI_SUPPORT
reg spi_1to4 = 1;//(idx < (`ALL_DEV_NUM * 4)); reg spi_1to4;//(idx < (`ALL_DEV_NUM * 4));
`endif `endif
assign spi_mosi = exChangeRego[7]; assign spi_mosi = exChangeRego[7];
`ifndef OLD_SPI_SUPPORT `ifndef OLD_SPI_SUPPORT
assign qspi_mosi = (spi_1to4 & byteCnt < 4)? {3'h0, exChangeRego[7]}:exChangeRego[7:4]; assign qspi_mosi = (spi_1to4 & transCnt <= 4)? {3'h0, exChangeRego[7]}:exChangeRego[7:4];
`else `else
assign qspi_mosi = exChangeRego[7:4]; assign qspi_mosi = exChangeRego[7:4];
`endif `endif
@@ -575,7 +575,7 @@ always @(negedge sck) begin
`else `else
//当单线转4线的协议生效时，且传输命令+地址，使用单线 //当单线转4线的协议生效时，且传输命令+地址，使用单线
//否则使用接口的固定模式 //否则使用接口的固定模式
if (spi_1to4 & byteCnt < 4) begin if (spi_1to4 & transCnt <= 4) begin
exChangeRego <= exChangeRego << 1; exChangeRego <= exChangeRego << 1;
end else begin end else begin
exChangeRego <= isQspi ? exChangeRego << 4 : exChangeRego << 1; exChangeRego <= isQspi ? exChangeRego << 4 : exChangeRego << 1;
@@ -590,6 +590,7 @@ always @(negedge sck) begin
if( isBusy ) begin if( isBusy ) begin
if( transCnt == length & &bitCnt ) begin if( transCnt == length & &bitCnt ) begin
spi_csn[idx] <= #(`SCKFRE/2) 1'b1; spi_csn[idx] <= #(`SCKFRE/2) 1'b1;
exChangeRego <= 0;
end end
end end
end end
@@ -603,7 +604,7 @@ always @(posedge sck) begin
bitCnt <= ~bitCnt; bitCnt <= ~bitCnt;
`else `else
//当单线转4线的协议生效时，且传输命令+地址，使用单线;数据使用4线 //当单线转4线的协议生效时，且传输命令+地址，使用单线;数据使用4线
if ((byteCnt < 4) & (spi_1to4)) begin if ((transCnt <= 4) & (spi_1to4)) begin
bitCnt <= bitCnt + 1; bitCnt <= bitCnt + 1;
end else begin end else begin
bitCnt <= ~bitCnt; bitCnt <= ~bitCnt;
@@ -666,7 +667,7 @@ always @(posedge sck) begin
end end
end else begin end else begin
//字节数小于4个字节，且启动了QSPI的1线命令4线数据 //字节数小于4个字节，且启动了QSPI的1线命令4线数据
if ((byteCnt < 4) & (spi_1to4)) begin if ((transCnt <= 4) & (spi_1to4)) begin
exChangeRegi <= isQspi ? {exChangeRegi[6:0], qspi_mux_miso[0]} : {exChangeRegi[6:0], spi_mux_miso}; exChangeRegi <= isQspi ? {exChangeRegi[6:0], qspi_mux_miso[0]} : {exChangeRegi[6:0], spi_mux_miso};
end else begin end else begin
exChangeRegi <= isQspi ? {exChangeRegi[3:0], qspi_mux_miso} : {exChangeRegi[6:0], spi_mux_miso}; exChangeRegi <= isQspi ? {exChangeRegi[3:0], qspi_mux_miso} : {exChangeRegi[6:0], spi_mux_miso};
@@ -704,11 +705,13 @@ task spi_trans( input [15:0] saddress, input [7:0] scmd, input [12:0] slength, i
if (sidx < (`ALL_DEV_NUM * 3)) begin if (sidx < (`ALL_DEV_NUM * 3)) begin
length <= slength + 4; length <= slength + 4;
end else if (sidx < (`ALL_DEV_NUM * 4)) begin end else if (sidx < (`ALL_DEV_NUM * 4)) begin
length <= slength + 4 + 1; //length <= slength + 4 + 1;
length <= slength + 4;
end else if (sidx < (`ALL_DEV_NUM * 5)) begin end else if (sidx < (`ALL_DEV_NUM * 5)) begin
length <= slength + 4; length <= slength + 4;
end else begin end else begin
length <= slength + 4 + 1; //length <= slength + 4 + 1;
length <= slength + 4;
end end
`endif `endif
@@ -1078,7 +1081,7 @@ task wait_comm_finished(input [16:0] dev_idx);
end end
#2000 #2000
//$display("%x %x", rxBuf[3], rxBuf[6]); $display("%x %x %x %x %t", rxBuf[`ARRAY_IDX_OFF], rxBuf[`ARRAY_IDX_OFF + 1], rxBuf[`ARRAY_IDX_OFF + 2], rxBuf[`ARRAY_IDX_OFF + 3], $realtime);
if ((rxBuf[`ARRAY_IDX_OFF] & 8'h02) == 8'h02) if ((rxBuf[`ARRAY_IDX_OFF] & 8'h02) == 8'h02)
begin begin
is_run = 0; is_run = 0;

12
tb/shinTest/gen_pkt.py
View File

@@ -74,12 +74,12 @@ if __name__ == '__main__':
#''' #'''
add_tc_2_runlist(base.tc1()) add_tc_2_runlist(base.tc1())
add_tc_2_runlist(base.tc2()) #add_tc_2_runlist(base.tc2())
add_tc_2_runlist(base.tc3()) #add_tc_2_runlist(base.tc3())
add_tc_2_runlist(base.tc4()) #add_tc_2_runlist(base.tc4())
add_tc_2_runlist(base.tc5()) #add_tc_2_runlist(base.tc5())
add_tc_2_runlist(base.tc6()) #add_tc_2_runlist(base.tc6())
add_tc_2_runlist(base.tc7()) #add_tc_2_runlist(base.tc7())
''' '''
add_tc_2_runlist(base.tc8()) add_tc_2_runlist(base.tc8())
add_tc_2_runlist(base.tc9()) add_tc_2_runlist(base.tc9())