diff --git a/tb/shinTest/ShinTopSpiTb.v b/tb/shinTest/ShinTopSpiTb.v
index afd9b59..a76793d 100644
--- a/tb/shinTest/ShinTopSpiTb.v
+++ b/tb/shinTest/ShinTopSpiTb.v
@@ -1,5 +1,15 @@
 `timescale 1 ns / 1 ps
 
+//`define ENABLE_REG_RW_TEST
+`define ENABLE_DET_TEST
+`define ENABLE_SET_ADDR_TEST
+//`define ENABLE_SM1_SEND_TEST
+`define ENABLE_EXCHG_DATA_SEQ_TEST
+  //`define ENABLE_EXCHG_DATA_SEQ0_TEST
+  //`define ENABLE_EXCHG_DATA_SEQ1_TEST
+  //`define ENABLE_EXCHG_DATA_SEQ2_TEST
+  `define ENABLE_EXCHG_DATA_BC_TEST
+//`define ENABLE_SYNC_TEST
 
 module ShinTopSpiTb(
 
@@ -212,7 +222,33 @@ initial begin
 	#240
 	reset <= 0;
 
-#20000000
+`ifdef ENABLE_REG_RW_TEST
+
+`endif
+`ifdef ENABLE_DET_TEST
+`endif
+`ifdef ENABLE_SET_ADDR_TEST
+`endif
+
+`ifdef ENABLE_SM1_SEND_TEST
+`endif
+`ifdef ENABLE_EXCHG_DATA_SEQ_TEST
+  `ifdef ENABLE_EXCHG_DATA_SEQ0_TEST
+  `endif
+  `ifdef ENABLE_EXCHG_DATA_SEQ1_TEST
+  `endif
+  `ifdef ENABLE_EXCHG_DATA_SEQ2_TEST
+  `endif
+  `ifdef ENABLE_EXCHG_DATA_BC_TEST
+  `endif
+`endif
+`ifdef ENABLE_SYNC_TEST
+`endif
+
+
+//#20000000
+#5000000
+
 	$display("Time Out !!!");
   	$fclose(spidata_file);
 	$stop;
@@ -503,16 +539,7 @@ endtask
 `define MST_RX_LEN_ADDR     (`MST_RX0_LEN_ADDR)
 `define MST_TX_LEN_ADDR     (`MST_TX0_LEN_ADDR)
 
-//`define ENABLE_REG_RW_TEST
-`define ENABLE_DET_TEST
-`define ENABLE_SET_ADDR_TEST
-//`define ENABLE_SM1_SEND_TEST
-`define ENABLE_EXCHG_DATA_SEQ_TEST
-  //`define ENABLE_EXCHG_DATA_SEQ0_TEST
-  //`define ENABLE_EXCHG_DATA_SEQ1_TEST
-  `define ENABLE_EXCHG_DATA_SEQ2_TEST
-  //`define ENABLE_EXCHG_DATA_BC_TEST
-//`define ENABLE_SYNC_TEST
+
 /*---------------------------------------------------------------------------------------------------------
 测试用例1
 ---------------------------------------------------------------------------------------------------------*/