增加测试串行线路采样数据的代码, 可以回答晶体容限\漂移\滤波器效果等问题
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7
Makefile
7
Makefile
@@ -53,9 +53,14 @@ testShin:
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vvp -N ./tb/build/shinTest.iverilog -lxt2 || true
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./tb/shinTest/check_testcase.py
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testFilter:
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./tb/shinTest/test_filter.py
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vcdFilter:
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gtkwave ./tb/build/test_filter.vcd 1>/dev/null 2>&1 &
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vcdShin:
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gtkwave ./tb/build/wave.vcd &
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gtkwave ./tb/build/wave.vcd 1>/dev/null 2>&1 &
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ef:
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sbt "test:runMain test.testModule"
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