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调整异频异相时钟的测试参数

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bacon
2025-09-08 23:41:59 +08:00
parent cc51f206de
commit b51b56688a
1 changed files with 4 additions and 4 deletions
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8
tb/shinTest/Makefile_vcs
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@@ -33,7 +33,7 @@ testShinClk_vcs:
mv spi_trans_data.txt generated/spi_trans_data1.txt
mv generated/wave.vcd generated/wave1.vcd
\
python3 ./shinTest/gen_pkt_clk.py --dev1 45 180 --dev3 25 -180 -8b10b
python3 ./shinTest/gen_pkt_clk.py --dev1 45 180 --dev3 70 -180 -8b10b
mkdir -p generated/log
rm -rf generated/log/*
${VCS} -f ./shinTestClk_vcs.f
@@ -51,7 +51,7 @@ testShinClk_vcs:
mv spi_trans_data.txt generated/spi_trans_data3.txt
mv generated/wave.vcd generated/wave3.vcd
\
python3 ./shinTest/gen_pkt_clk.py --dev1 45 186 --dev3 25 -186
python3 ./shinTest/gen_pkt_clk.py --dev1 60 186 --dev3 15 -186
mkdir -p generated/log
rm -rf generated/log/*
${VCS} -f ./shinTestClk_vcs.f
@@ -60,7 +60,7 @@ testShinClk_vcs:
mv spi_trans_data.txt generated/spi_trans_data4.txt
mv generated/wave.vcd generated/wave4.vcd
\
python3 ./shinTest/gen_pkt_clk.py --dev1 45 187 --dev3 25 -187
python3 ./shinTest/gen_pkt_clk.py --dev1 80 187 --dev2 30 -187
mkdir -p generated/log
rm -rf generated/log/*
${VCS} -f ./shinTestClk_vcs.f
@@ -69,7 +69,7 @@ testShinClk_vcs:
mv spi_trans_data.txt generated/spi_trans_data5.txt
mv generated/wave.vcd generated/wave5.vcd
\
python3 ./shinTest/gen_pkt_clk.py --dev1 45 188 --dev3 25 -188 -8b10b
python3 ./shinTest/gen_pkt_clk.py --dev1 70 188 --dev3 223 -188 -8b10b
mkdir -p generated/log
rm -rf generated/log/*
${VCS} -f ./shinTestClk_vcs.f