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清硬件错误中断多打一拍以优化cdrin的时序

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This commit is contained in:
Ruige Lee
2025-08-22 17:26:52 +08:00
parent d2899df8b4
commit b2da5cfb64
2 changed files with 8 additions and 8 deletions
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8
src/main/scala/backBoard/shin/ShinTop.scala
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@@ -380,10 +380,10 @@ trait ShinTopSlave{ this: ShinTopBase =>
slaveParser.io.intHWClr(0) := interface.io.intHWTrig(0) & interface.io.intHWClr(0)
slaveParser.io.intHWClr(1) := interface.io.intHWTrig(1) & interface.io.intHWClr(1)
downCDRIn.reset := reset.asBool | ( interface.io.intHWTrig(0) & interface.io.intHWClr(0) )
upCDRIn.reset := reset.asBool | ( interface.io.intHWTrig(1) & interface.io.intHWClr(1) )
downCDROut.reset := reset.asBool | ( interface.io.intHWTrig(0) & interface.io.intHWClr(0) )
upCDROut.reset := reset.asBool | ( interface.io.intHWTrig(1) & interface.io.intHWClr(1) )
downCDRIn.reset := reset.asBool | RegNext( interface.io.intHWTrig(0) & interface.io.intHWClr(0) )
upCDRIn.reset := reset.asBool | RegNext( interface.io.intHWTrig(1) & interface.io.intHWClr(1) )
downCDROut.reset := reset.asBool | RegNext( interface.io.intHWTrig(0) & interface.io.intHWClr(0) )
upCDROut.reset := reset.asBool | RegNext( interface.io.intHWTrig(1) & interface.io.intHWClr(1) )
interface.io.lvds <> slaveParser.io.lvds