From a9f741deca00752ce4e86579e7d8caf75443695e Mon Sep 17 00:00:00 2001 From: bacon Date: Thu, 13 Feb 2025 22:46:21 +0800 Subject: [PATCH] =?UTF-8?q?=E5=B0=86mstStartup=E5=92=8CslvStartup=E4=BB=A3?= =?UTF-8?q?=E7=A0=81=E5=90=88=E4=BA=8C=E4=B8=BA=E4=B8=80=EF=BC=9B=E5=A2=9E?= =?UTF-8?q?=E5=8A=A0mtime=E7=9A=84=E9=A9=B1=E5=8A=A8=E4=BB=A3=E7=A0=81?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .vscode/settings.json | 3 +- Makefile | 15 +++ tb/sw/src/clint.c | 54 ++++++++++ tb/sw/src/clint.h | 38 +++++++ tb/sw/src/halfLvdsMacSvr.c | 37 ++++--- tb/sw/src/mstStartup.S | 174 +----------------------------- tb/sw/src/slvStartup.S | 169 +---------------------------- tb/sw/src/startup.S | 215 +++++++++++++++++++++++++++++++++++++ tb/sw/src/sysDef.h | 2 - 9 files changed, 346 insertions(+), 361 deletions(-) create mode 100644 tb/sw/src/clint.c create mode 100644 tb/sw/src/clint.h create mode 100644 tb/sw/src/startup.S diff --git a/.vscode/settings.json b/.vscode/settings.json index d39b29e..9a259f6 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -4,6 +4,7 @@ }, "files.associations": { "system_cfg.h": "c", - "plic.h": "c" + "plic.h": "c", + "compare": "c" } } \ No newline at end of file diff --git a/Makefile b/Makefile index 844f42d..3f84130 100644 --- a/Makefile +++ b/Makefile @@ -109,6 +109,13 @@ sw: -c ./tb/sw/src/mstStartup.S \ -o ./tb/sw/build/mstStartup.o + + $(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \ + -I ./tb/sw/ -I ./tb/sw/src \ + -I ./tb/sw/tl2cdr \ + -c ./tb/sw/src/clint.c \ + -o ./tb/sw/build/clint.o + $(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \ -I ./tb/sw/ -I ./tb/sw/src \ -I ./tb/sw/tl2cdr \ @@ -141,6 +148,7 @@ sw: ./tb/sw/build/tl2cdr.o \ ./tb/sw/build/halfLvdsMacSvr.o \ ./tb/sw/build/plic.o \ + ./tb/sw/build/clint.o \ -o ./tb/sw/build/mstTest.elf $(TARGET)-objcopy -O binary ./tb/sw/build/mstTest.elf ./tb/sw/build/mstTest.bin @@ -179,6 +187,12 @@ sw: -c ./tb/sw/tl2cdr/tl2cdr.c \ -o ./tb/sw/build/tl2cdr.o + $(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \ + -I ./tb/sw/ -I ./tb/sw/src \ + -I ./tb/sw/tl2cdr \ + -c ./tb/sw/src/clint.c \ + -o ./tb/sw/build/clint.o + $(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \ -I ./tb/sw/ -I ./tb/sw/src \ -I ./tb/sw/tl2cdr \ @@ -211,6 +225,7 @@ sw: ./tb/sw/build/tl2cdr.o \ ./tb/sw/build/halfLvdsMacSvr.o \ ./tb/sw/build/plic.o \ + ./tb/sw/build/clint.o \ -o ./tb/sw/build/slvTest.elf $(TARGET)-objcopy -O binary ./tb/sw/build/slvTest.elf ./tb/sw/build/slvTest.bin diff --git a/tb/sw/src/clint.c b/tb/sw/src/clint.c new file mode 100644 index 0000000..c0db90d --- /dev/null +++ b/tb/sw/src/clint.c @@ -0,0 +1,54 @@ +#include "clint.h" + + +volatile const uint32_t * const mtime_high = (volatile const uint32_t*)(CLINT_BASE + CLINT_MTIME_HIGH); +volatile const uint32_t * const mtime_low = (volatile const uint32_t*)(CLINT_BASE + CLINT_MTIME_LOW); +volatile uint32_t * const mtimecmp_high = (volatile const uint32_t*)(CLINT_BASE + CLINT_MTIMECMP_HIGH); +volatile uint32_t * const mtimecmp_low = (volatile const uint32_t*)(CLINT_BASE + CLINT_MTIMECMP_LOW); +volatile uint32_t mtimer_int_flag = 0; + +void set_mtimecmp(uint64_t value) +{ + *mtimecmp_high = 0xFFFFFFFF; // 先写入高 32 位为全 1（禁用中断） + *mtimecmp_low = (uint32_t)value; // 写入低 32 位 + *mtimecmp_high = (uint32_t)(value >> 32); // 写入高 32 位 +} + + +uint64_t read_mtimer() +{ + uint32_t hi, lo; + do { + hi = *mtime_high; // 读取高 32 位 + lo = *mtime_low; // 读取低 32 位 + } while (hi != *mtime_high); // 检查高 32 位是否变化（避免进位） + return (((uint64_t)hi << 32) | lo); +} + +void enable_mtimer_int() +{ + __asm__ volatile ("csrs mie, %0" :: "r"(0x80)); // mie.MTIE = 1 + __asm__ volatile ("csrs mstatus, %0" :: "r"(0x8)); // mstatus.MIE = 1 +} + +void disable_mtimer_int() +{ + __asm__ volatile ("csrc mie, %0" :: "r"(0x80)); // mie.MTIE = 0 + __asm__ volatile ("csrc mstatus, %0" :: "r"(0x8)); // mstatus.MIE = 0 +} + +void set_mtimer(uint32_t delta_t) +{ + uint64_t t; + + t = read_mtimer(); + t += delta_t; + set_mtimecmp(t); + #if 0 + uint64_t t; + + t = *(volatile uint64_t *)(CLINT_BASE + CLINT_MTIME_LOW); + t += delta_t; + *(volatile uint64_t *)(CLINT_BASE + CLINT_MTIMECMP_LOW) = t; + #endif +} \ No newline at end of file diff --git a/tb/sw/src/clint.h b/tb/sw/src/clint.h new file mode 100644 index 0000000..11f8fcb --- /dev/null +++ b/tb/sw/src/clint.h @@ -0,0 +1,38 @@ +#ifndef __CLINT_H__ +#define __CLINT_H__ + + + + +#define CLINT_MTIME_TICK_PERIOD 4 //ns + + +#define CLINT_BASE (0x2000000) +#define CLINT_MTIME_LOW (0xBFF8) +#define CLINT_MTIME_HIGH (0xBFFC) +#define CLINT_MTIMECMP_LOW (0x4000) +#define CLINT_MTIMECMP_HIGH (0x4004) + + +#ifndef __ASSEMBLER__ + +#include "stdint.h" +extern volatile const uint32_t * const mtime_high; +extern volatile const uint32_t * const mtime_low; +extern volatile uint32_t * const mtimecmp_high; +extern volatile uint32_t * const mtimecmp_low; + +extern volatile uint32_t mtimer_int_flag; + +uint64_t read_timer(void); +void set_mtimecmp(uint64_t value) ; +void enable_mtimer_int(); +void disable_mtimer_int(); +void set_mtimer(uint32_t delta_t); + +#endif + + +#endif + + diff --git a/tb/sw/src/halfLvdsMacSvr.c b/tb/sw/src/halfLvdsMacSvr.c index b35b987..2f385fb 100644 --- a/tb/sw/src/halfLvdsMacSvr.c +++ b/tb/sw/src/halfLvdsMacSvr.c @@ -3,6 +3,7 @@ #include "tl2cdr.h" #include "halfLvdsMacSvr.h" #include "plic.h" +#include "clint.h" //------------------------------------------------------------------- uint8_t MST_TX_BUF[TX_BUF_NUM * TX_BUF_MAX_LEN] __attribute__((aligned(32))); @@ -13,12 +14,8 @@ uint8_t MST_RX_BUF[RX_BUF_NUM * RX_BUF_MAX_LEN] __attribute__((aligned(32))); extern const uint8_t int_svr_code[]; uint32_t (*sys_call)(uint32_t no, ...); - - - static uint32_t HLM_slave_poll(void); - -volatile uint32_t isr_flag[32] = {0}; +volatile uint32_t exti_isr_flag[32] = {0}; uint32_t HLM_poll(uint32_t mode) { @@ -36,12 +33,12 @@ uint32_t HLM_poll(uint32_t mode) uint32_t rx_pkt_len = 0; uint32_t rx_start = 0; uint32_t status; + uint32_t is_exit = 0; uint32_t i; uint32_t *tx_data_ptr = (uint32_t *)MST_TX_BUF; uint32_t *rx_data_ptr = (uint32_t *)MST_RX_BUF; - //准备数据 for (i = 0; i < tx_pkt_len; i++) MST_TX_BUF[i] = i; @@ -65,7 +62,7 @@ uint32_t HLM_poll(uint32_t mode) break; } - while (1) + while (!is_exit) { status = *HLM_status; @@ -95,18 +92,20 @@ uint32_t HLM_poll(uint32_t mode) { rx_start = 0; rx_index = 0; + is_exit = 1; break; } } } - if (isr_flag[CDR_INT_RX1START]) + if (exti_isr_flag[CDR_INT_RX1START]) { - isr_flag[CDR_INT_RX1START] = 0; + exti_isr_flag[CDR_INT_RX1START] = 0; rx_start = 1; rx_index = 0; } } + } else if (mode == WORKMODE_SLAVE) { @@ -133,6 +132,7 @@ uint32_t HLM_slave_poll(void) uint32_t status; uint32_t is_terminal = 1; + uint32_t detect_status = 1; //填充检测下行设备的包 uint32_t detect_pkt = MAGIC_NUM; @@ -146,13 +146,13 @@ uint32_t HLM_slave_poll(void) *plic_enable_0_31 = 0; + set_mtimer(100); + enable_mtimer_int(); + #ifdef __riscv_e sys_call(SYS_SLAVE_WORK); #else - - - while (1) { @@ -164,7 +164,7 @@ uint32_t HLM_slave_poll(void) for (i = 0; i < HLM_RX0_FIFO_LEFT(status); i++) { - if (down_rx_start) // && (status & HLM_RX0_VALID)) + if (down_rx_start) {//处理上行接收 uint32_t data; data = *rx0_rxFifo; @@ -181,8 +181,6 @@ uint32_t HLM_slave_poll(void) down_rx_start = 0; break; } - if ((rx_index & 0x1f) == 10) - detect_start = 1; } else break; @@ -206,8 +204,15 @@ uint32_t HLM_slave_poll(void) { *rx1_softReset = 1; *tx0_softReset = 1; + detect_status = 1; } } + + if (mtimer_int_flag) + { + mtimer_int_flag = 0; + detect_start = 1; + } } else {//不是终节点 @@ -219,5 +224,3 @@ uint32_t HLM_slave_poll(void) } - - diff --git a/tb/sw/src/mstStartup.S b/tb/sw/src/mstStartup.S index 6f53831..2e271c2 100644 --- a/tb/sw/src/mstStartup.S +++ b/tb/sw/src/mstStartup.S @@ -1,173 +1 @@ -#include "tl2cdr.h" - -.extern main - -.extern int_svr_code -.extern plic_claim -.extern isr_flag - -#ifdef __riscv_i -.extern plic_handle -#endif - -.globl _prog_start -.section .text.init - - -_prog_start: - li x1, 0 - li x2, 0 - li x3, 0 - li x4, 0 - li x5, 0 - li x6, 0 - li x7, 0 - li x8, 0 - li x9, 0 - li x10, 0 - li x11, 0 - li x12, 0 - li x13, 0 - li x14, 0 - li x15, 0 -#ifdef __riscv_i - li x16, 0 - li x17, 0 - li x18, 0 - li x19, 0 - li x20, 0 - li x21, 0 - li x22, 0 - li x23, 0 - li x24, 0 - li x25, 0 - li x26, 0 - li x27, 0 - li x28, 0 - li x29, 0 - li x30, 0 - li x31, 0 -#endif - - li sp, 0x40011000 - -#ifdef __riscv_i - la t0, trap_entry -#else - li a0, 0 - - lui t0, %hi(plic_claim) - lw a1, %lo(plic_claim)(t0) - - la a2, isr_flag - - call int_svr_code - mv t0, a0 #这里选择不同的trap_entry服务函数,这个是RV32I的代码 -#endif - csrw mtvec, t0 - li t0, 1 << 11 - csrw mie, t0 - - csrr t0, mstatus - ori t0, t0, 1<<3 - csrw mstatus, t0 - - call main - - ecall - -#ifdef __riscv_i - .balign 32 -trap_entry: -#.macro define_const name, value -# .equ \name, \value -#.endm -## 使用宏定义常量 -#define_const CDR_INT_TXEND, 14 -opt_trap_entry: - - addi sp,sp,136 - - #sw ra,4(sp) - #sw sp,8(sp) - #sw gp,12(sp) - #sw tp,16(sp) - - sw t0,20(sp) - sw t1,24(sp) - #sw t2,28(sp) - sw s0,32(sp) - sw s1,36(sp) - - #sw a0,40(sp) - #sw a1,44(sp) - #sw a2,48(sp) - #sw a3,52(sp) - #sw a4,56(sp) - #sw a5,60(sp) - #sw a6,64(sp) - #sw a7,68(sp) - #sw s2,72(sp) - #sw s3,76(sp) - #sw s4,80(sp) - #sw s5,84(sp) - #sw s6,88(sp) - #sw s7,92(sp) - #sw s8,96(sp) - #sw s9,100(sp) - #sw s10,104(sp) - #sw s11,108(sp) - #sw t3,112(sp) - #sw t4,116(sp) - #sw t5,120(sp) - #sw t6,124(sp) - - lui t1, %hi(plic_claim) - lw t0, %lo(plic_claim)(t1) # t0 = &plic_claim - - lw t1, 0(t0) # t1 = *plic_claim - sw t1, 0(t0) # *plic_claim = t1 - - slli s0, t1, 2 - la s1, isr_flag - add s1, s1, s0 - li t0, 1 - sw t0, 0(s1) - - #lw ra,4(sp) - #lw sp,8(sp) - #lw gp,12(sp) - #lw tp,16(sp) - - lw t0,20(sp) - lw t1,24(sp) - #lw t2,28(sp) - lw s0,32(sp) - lw s1,36(sp) - - #lw a0,40(sp) - #lw a1,44(sp) - #lw a2,48(sp) - #lw a3,52(sp) - #lw a4,56(sp) - #lw a5,60(sp) - #lw a6,64(sp) - #lw a7,68(sp) - #lw s2,72(sp) - #lw s3,76(sp) - #lw s4,80(sp) - #lw s5,84(sp) - #lw s6,88(sp) - #lw s7,92(sp) - #lw s8,96(sp) - #lw s9,100(sp) - #lw s10,104(sp) - #lw s11,108(sp) - #lw t3,112(sp) - #lw t4,116(sp) - #lw t5,120(sp) - #lw t6,124(sp) - - addi sp,sp,136 - mret -#endif \ No newline at end of file +#include "startup.S" \ No newline at end of file diff --git a/tb/sw/src/slvStartup.S b/tb/sw/src/slvStartup.S index b3d586e..2e271c2 100644 --- a/tb/sw/src/slvStartup.S +++ b/tb/sw/src/slvStartup.S @@ -1,168 +1 @@ -#include "tl2cdr.h" -//#include "system_cfg.h" - -.extern main -.extern int_svr_code -.extern plic_claim -.extern isr_flag - -.globl _prog_start -.section .text.init -_prog_start: - li x1, 0 - li x2, 0 - li x3, 0 - li x4, 0 - li x5, 0 - li x6, 0 - li x7, 0 - li x8, 0 - li x9, 0 - li x10, 0 - li x11, 0 - li x12, 0 - li x13, 0 - li x14, 0 - li x15, 0 -#ifdef __riscv_i - li x16, 0 - li x17, 0 - li x18, 0 - li x19, 0 - li x20, 0 - li x21, 0 - li x22, 0 - li x23, 0 - li x24, 0 - li x25, 0 - li x26, 0 - li x27, 0 - li x28, 0 - li x29, 0 - li x30, 0 - li x31, 0 -#endif - li sp, 0x40011000 - -#ifdef __riscv_i - la t0, trap_entry -#else - li a0, 0 - - lui t0, %hi(plic_claim) - lw a1, %lo(plic_claim)(t0) - - la a2, isr_flag - - call int_svr_code - mv t0, a0 #这里选择不同的trap_entry服务函数,这个是RV32I的代码 -#endif - - csrw mtvec, t0 - li t0, 1 << 11 - csrw mie, t0 - - csrr t0, mstatus - ori t0, t0, 1<<3 - csrw mstatus, t0 - - call main - - ecall - - -#ifdef __riscv_i - .balign 32 -trap_entry: -#.macro define_const name, value -# .equ \name, \value -#.endm -## 使用宏定义常量 -#define_const CDR_INT_TXEND, 14 -opt_trap_entry: - - addi sp,sp,136 - - #sw ra,4(sp) - #sw sp,8(sp) - #sw gp,12(sp) - #sw tp,16(sp) - - sw t0,20(sp) - sw t1,24(sp) - #sw t2,28(sp) - sw s0,32(sp) - sw s1,36(sp) - - #sw a0,40(sp) - #sw a1,44(sp) - #sw a2,48(sp) - #sw a3,52(sp) - #sw a4,56(sp) - #sw a5,60(sp) - #sw a6,64(sp) - #sw a7,68(sp) - #sw s2,72(sp) - #sw s3,76(sp) - #sw s4,80(sp) - #sw s5,84(sp) - #sw s6,88(sp) - #sw s7,92(sp) - #sw s8,96(sp) - #sw s9,100(sp) - #sw s10,104(sp) - #sw s11,108(sp) - #sw t3,112(sp) - #sw t4,116(sp) - #sw t5,120(sp) - #sw t6,124(sp) - - lui t1, %hi(plic_claim) - lw t0, %lo(plic_claim)(t1) # t0 = &plic_claim - - lw t1, 0(t0) # t1 = *plic_claim - sw t1, 0(t0) # *plic_claim = t1 - - slli s0, t1, 2 - la s1, isr_flag - add s1, s1, s0 - li t0, 1 - sw t0, 0(s1) - - #lw ra,4(sp) - #lw sp,8(sp) - #lw gp,12(sp) - #lw tp,16(sp) - - lw t0,20(sp) - lw t1,24(sp) - #lw t2,28(sp) - lw s0,32(sp) - lw s1,36(sp) - - #lw a0,40(sp) - #lw a1,44(sp) - #lw a2,48(sp) - #lw a3,52(sp) - #lw a4,56(sp) - #lw a5,60(sp) - #lw a6,64(sp) - #lw a7,68(sp) - #lw s2,72(sp) - #lw s3,76(sp) - #lw s4,80(sp) - #lw s5,84(sp) - #lw s6,88(sp) - #lw s7,92(sp) - #lw s8,96(sp) - #lw s9,100(sp) - #lw s10,104(sp) - #lw s11,108(sp) - #lw t3,112(sp) - #lw t4,116(sp) - #lw t5,120(sp) - #lw t6,124(sp) - - addi sp,sp,136 - mret -#endif \ No newline at end of file +#include "startup.S" \ No newline at end of file diff --git a/tb/sw/src/startup.S b/tb/sw/src/startup.S new file mode 100644 index 0000000..7e7770b --- /dev/null +++ b/tb/sw/src/startup.S @@ -0,0 +1,215 @@ +#include "tl2cdr.h" + +.extern main + +.extern int_svr_code +.extern plic_claim +.extern exti_isr_flag +.extern mtimer_int_flag + +#ifdef __riscv_i +.extern plic_handle +#endif + +.globl _prog_start +.section .text.init + + +_prog_start: + li x1, 0 + li x2, 0 + li x3, 0 + li x4, 0 + li x5, 0 + li x6, 0 + li x7, 0 + li x8, 0 + li x9, 0 + li x10, 0 + li x11, 0 + li x12, 0 + li x13, 0 + li x14, 0 + li x15, 0 +#ifdef __riscv_i + li x16, 0 + li x17, 0 + li x18, 0 + li x19, 0 + li x20, 0 + li x21, 0 + li x22, 0 + li x23, 0 + li x24, 0 + li x25, 0 + li x26, 0 + li x27, 0 + li x28, 0 + li x29, 0 + li x30, 0 + li x31, 0 +#endif + + li sp, 0x40011000 + +#ifdef __riscv_i + la t0, trap_entry +#else + li a0, 0 + + lui t0, %hi(plic_claim) + lw a1, %lo(plic_claim)(t0) + + la a2, exti_isr_flag + + call int_svr_code + mv t0, a0 #这里选择不同的trap_entry服务函数,这个是RV32I的代码 +#endif + csrw mtvec, t0 + li t0, 1 << 11 + csrw mie, t0 + + csrr t0, mstatus + ori t0, t0, 1<<3 + csrw mstatus, t0 + + call main + + ecall + +#ifdef __riscv_i + .balign 32 +trap_entry: +#.macro define_const name, value +# .equ \name, \value +#.endm +## 使用宏定义常量 +#define_const CDR_INT_TXEND, 14 +opt_trap_entry: + + addi sp,sp,136 + + #sw ra,4(sp) + #sw sp,8(sp) + #sw gp,12(sp) + #sw tp,16(sp) + + sw t0,20(sp) + sw t1,24(sp) + sw t2,28(sp) + sw s0,32(sp) + sw s1,36(sp) + + #sw a0,40(sp) + #sw a1,44(sp) + #sw a2,48(sp) + #sw a3,52(sp) + #sw a4,56(sp) + #sw a5,60(sp) + #sw a6,64(sp) + #sw a7,68(sp) + #sw s2,72(sp) + #sw s3,76(sp) + #sw s4,80(sp) + #sw s5,84(sp) + #sw s6,88(sp) + #sw s7,92(sp) + #sw s8,96(sp) + #sw s9,100(sp) + #sw s10,104(sp) + #sw s11,108(sp) + #sw t3,112(sp) + #sw t4,116(sp) + #sw t5,120(sp) + #sw t6,124(sp) + + csrr t2, mcause + li s0, 0x80000000 + and s0, t2, s0 +1: beqz s0, 1b #这个是异常,死循环查问题吧 + andi s0, t2, 0xf + la t2, isr_j_table + slli s0, s0, 2 + add t2, t2, s0 + jr t2 + +swi_isr: + j exit_isr # jump to exit_isr + +mtime_isr: + li t1, 0x80 + csrc mie, t1 + la t1, mtimer_int_flag + li t0, 1 + sw t0, 0(t1) + j exit_isr # jump to exit_isr + +exti_isr: + lui t1, %hi(plic_claim) + lw t0, %lo(plic_claim)(t1) # t0 = &plic_claim + + lw t1, 0(t0) # t1 = *plic_claim + sw t1, 0(t0) # *plic_claim = t1 + + slli s0, t1, 2 + la s1, exti_isr_flag + add s1, s1, s0 + li t0, 1 + sw t0, 0(s1) + + #lw ra,4(sp) + #lw sp,8(sp) + #lw gp,12(sp) + #lw tp,16(sp) + +exit_isr: + lw t0,20(sp) + lw t1,24(sp) + lw t2,28(sp) + lw s0,32(sp) + lw s1,36(sp) + + #lw a0,40(sp) + #lw a1,44(sp) + #lw a2,48(sp) + #lw a3,52(sp) + #lw a4,56(sp) + #lw a5,60(sp) + #lw a6,64(sp) + #lw a7,68(sp) + #lw s2,72(sp) + #lw s3,76(sp) + #lw s4,80(sp) + #lw s5,84(sp) + #lw s6,88(sp) + #lw s7,92(sp) + #lw s8,96(sp) + #lw s9,100(sp) + #lw s10,104(sp) + #lw s11,108(sp) + #lw t3,112(sp) + #lw t4,116(sp) + #lw t5,120(sp) + #lw t6,124(sp) + + addi sp,sp,136 + mret + +isr_j_table: +1: j 1b # 0 jump to unknown_isr +1: j 1b # 1 jump to unknown_isr +1: j 1b # 2 jump to unknown_isr + j swi_isr # 3 jump to swi_isr +1: j 1b # 4 jump to unknown_isr +1: j 1b # 5 jump to unknown_isr +1: j 1b # 6 jump to unknown_isr + j mtime_isr # 7 jump to unknown_isr +1: j 1b # 8 jump to unknown_isr +1: j 1b # 9 jump to unknown_isr +1: j 1b # a jump to unknown_isr + j exti_isr # b jump to exti_isr +1: j 1b # c jump to unknown_isr +1: j 1b # d jump to unknown_isr +1: j 1b # e jump to unknown_isr +1: j 1b # f jump to unknown_isr +#endif \ No newline at end of file diff --git a/tb/sw/src/sysDef.h b/tb/sw/src/sysDef.h index a37db52..b8d71d7 100644 --- a/tb/sw/src/sysDef.h +++ b/tb/sw/src/sysDef.h @@ -10,7 +10,5 @@ #define WORKMODE_MASTER 0 #define WORKMODE_SLAVE 1 - - #endif