diff --git a/src/main/scala/backBoard/BackBoardMst.scala b/src/main/scala/backBoard/BackBoardMst.scala
index a0fb3dc..627774e 100644
--- a/src/main/scala/backBoard/BackBoardMst.scala
+++ b/src/main/scala/backBoard/BackBoardMst.scala
@@ -401,9 +401,12 @@ trait BackBoardMstLVDSTransmit{ this: BackBoardMstLVDSBase =>
       }
 
     } .elsewhen( stateCur === 3.U ){
-      stateCur := 4.U
-      ctrlTransmit := false.B
-      interrupt    := true.B
+      when( lvdsMst.io.upstream_crc_valid ){
+        stateCur := 4.U
+        ctrlTransmit := false.B
+        interrupt    := true.B
+      }
+
     } .otherwise{
 
     }