备份代码,尚未测试,实现全自动化生成verilog测试代码

This commit is contained in:
2025-08-02 15:59:42 +08:00
parent 3925cf3c0c
commit 9bfb5f919e
10 changed files with 249 additions and 86 deletions

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@@ -382,4 +382,6 @@ def genTcEndFrameCode(tcname):
+'''\t\t$fdisplay(spidata_file, "该测试用例运行时间:%t\\n", _t_end - _t_start);\n'''\
+f'''\t\t`END_TESTCASE("{__pre_gen_log_path}/{tcname}_result.log");\n'''\
+'''\tend\n'''
def genMessage(msg):
return f'''\t\t$fdisplay(spidata_file, "{msg}");\n'''