diff --git a/tb/sw/src/MstMain.c b/tb/sw/src/MstMain.c
index 93264b7..3a57953 100644
--- a/tb/sw/src/MstMain.c
+++ b/tb/sw/src/MstMain.c
@@ -3,21 +3,7 @@
 #include "mstMainCfg.h"
 #include "sysDef.h"
 
-volatile uint32_t *plic_priority_3   = (uint32_t*)( 0xc000000U + 0X000004 * 3);
-volatile uint32_t *plic_priority_4   = (uint32_t*)( 0xc000000U + 0X000004 * 4);
-volatile uint32_t *plic_priority_5   = (uint32_t*)( 0xc000000U + 0X000004 * 5);
-volatile uint32_t *plic_priority_6   = (uint32_t*)( 0xc000000U + 0X000004 * 6);
-
-volatile uint32_t *plic_priority_TxEnd   = (uint32_t*)( 0xc000000U + 0X000004 * CDR_INT_TXEND);
-volatile uint32_t *plic_priority_RxError = (uint32_t*)( 0xc000000U + 0X000004 * CDR_INT_RXERROR);
-volatile uint32_t *plic_priority_RxStart = (uint32_t*)( 0xc000000U + 0X000004 * CDR_INT_RXSTART);
-volatile uint32_t *plic_priority_RxEnd   = (uint32_t*)( 0xc000000U + 0X000004 * CDR_INT_RXEND);
-
-
-volatile uint32_t *plic_priority_18   = (uint32_t*)( 0xc000000U + 0X000004 * 18);
-volatile uint32_t *plic_priority_19   = (uint32_t*)( 0xc000000U + 0X000004 * 19);
-volatile uint32_t *plic_priority_20   = (uint32_t*)( 0xc000000U + 0X000004 * 20);
-volatile uint32_t *plic_priority_21   = (uint32_t*)( 0xc000000U + 0X000004 * 21);
+volatile uint32_t *const plic_priority = (uint32_t *)(0xc000000U);
 
 volatile uint32_t *plic_pending_0_31 = (uint32_t*)( 0xc000000U + 0X001000 );
 volatile uint32_t *plic_enable_0_31  = (uint32_t*)( 0xc000000U + 0X002000 );
@@ -37,26 +23,8 @@ extern const uint8_t int_svr_code[];
 uint32_t (*sys_call)(uint32_t no, ...);
 void main()
 {
-	#if 0
-	uint32_t readDat;
-	uint32_t operator;
-	uint32_t downRecvLen;
-	uint32_t upRecvLen;
-
-	uint32_t slvNum;
-	uint32_t totNum;
-
-	uint32_t isLast;
-
-	uint32_t crc;
-	#endif
-
-
 	int i;
 
-
-	
-
 	/*初始化plic*/
 	*plic_enable_0_31 =   1 << CDR_INT_TX0END
 						//| 1 << CDR_INT_TX1END
@@ -77,10 +45,19 @@ void main()
 						| 1 << CDR_INT_RX1_FIFO_ENQ
 						;
 
-	*plic_priority_TxEnd   = 1;
-	*plic_priority_RxError = 1;
-	*plic_priority_RxStart = 1;
-	*plic_priority_RxEnd   = 1;
+	plic_priority[CDR_INT_TX0END] = 1;
+	plic_priority[CDR_INT_TX1END] = 1;
+	plic_priority[CDR_INT_RX0ERROR] = 1;
+	plic_priority[CDR_INT_RX1ERROR] = 1;
+	plic_priority[CDR_INT_RX0START] = 1;
+	plic_priority[CDR_INT_RX1START] = 1;
+	plic_priority[CDR_INT_RX0END] = 1;
+	plic_priority[CDR_INT_RX1END] = 1;
+	plic_priority[CDR_INT_TX0_FIFO_DEQ] = 1;
+	plic_priority[CDR_INT_TX1_FIFO_DEQ] = 1;
+	plic_priority[CDR_INT_RX0_FIFO_ENQ] = 1;
+	plic_priority[CDR_INT_RX1_FIFO_ENQ] = 1;
+
 	*plic_threshold_0 = 0;
 
 	#if 0
@@ -95,6 +72,7 @@ void main()
 	//延迟等待从机复位，初始化
 	for (i = 0; i < 100; i++)
 		asm volatile("nop");
+
 	#endif
 
 	//while (init_svr_code() != 1);
diff --git a/tb/sw/src/SlvMain.c b/tb/sw/src/SlvMain.c
index 1dcfd7a..9e360e5 100644
--- a/tb/sw/src/SlvMain.c
+++ b/tb/sw/src/SlvMain.c
@@ -6,60 +6,13 @@
 #include "tl2cdr.h"
 
 
-
-
-volatile uint32_t *plic_priority_3   = (uint32_t*)( 0xc000000U + 0X000004 * 3);
-volatile uint32_t *plic_priority_4   = (uint32_t*)( 0xc000000U + 0X000004 * 4);
-volatile uint32_t *plic_priority_5   = (uint32_t*)( 0xc000000U + 0X000004 * 5);
-volatile uint32_t *plic_priority_6   = (uint32_t*)( 0xc000000U + 0X000004 * 6);
-
-volatile uint32_t *plic_priority_TxEnd   = (uint32_t*)( 0xc000000U + 0X000004 * CDR_INT_TXEND);
-volatile uint32_t *plic_priority_RxError = (uint32_t*)( 0xc000000U + 0X000004 * CDR_INT_RXERROR);
-volatile uint32_t *plic_priority_RxStart = (uint32_t*)( 0xc000000U + 0X000004 * CDR_INT_RXSTART);
-volatile uint32_t *plic_priority_RxEnd   = (uint32_t*)( 0xc000000U + 0X000004 * CDR_INT_RXEND);
-
-volatile uint32_t *plic_priority_18   = (uint32_t*)( 0xc000000U + 0X000004 * 18);
-volatile uint32_t *plic_priority_19   = (uint32_t*)( 0xc000000U + 0X000004 * 19);
-volatile uint32_t *plic_priority_20   = (uint32_t*)( 0xc000000U + 0X000004 * 20);
-volatile uint32_t *plic_priority_21   = (uint32_t*)( 0xc000000U + 0X000004 * 21);
+volatile uint32_t *const plic_priority = (uint32_t *)(0xc000000U);
 
 volatile uint32_t *plic_pending_0_31 = (uint32_t*)( 0xc000000U + 0X001000 );
 volatile uint32_t *plic_enable_0_31  = (uint32_t*)( 0xc000000U + 0X002000 );
 
 volatile uint32_t *plic_threshold_0  = (uint32_t*)( 0xc000000U + 0X200000 );
 volatile uint32_t *plic_claim        = (uint32_t*)( 0xc000000U + 0X200004 );
-
-
-volatile uint32_t flag_intTxEnd = 0;
-volatile uint32_t flag_intRxError = 0;
-volatile uint32_t flag_intRxStart = 0;
-volatile uint32_t flag_intRxEnd = 0;
-
-
-void plic_handle(){
-
-	
-	// 从 PLIC 中获取中断源 ID
-    uint32_t claim = *plic_claim;
-
-
-	if( claim == CDR_INT_TXEND ){
-		flag_intTxEnd = 1;
-	} else if( claim == CDR_INT_RXERROR ){
-		flag_intRxError = 1;
-	} else if( claim == CDR_INT_RXSTART ){
-		flag_intRxStart = 1;
-	} else if( claim == CDR_INT_RXEND ){
-		flag_intRxEnd = 1;
-	}
-
-    // 通知 PLIC 完成中断处理
-    *plic_claim = claim;
-	return;
-}
-
-
-
 	 
 static inline void error() {
     while(1);
@@ -68,12 +21,70 @@ static inline void error() {
 
 
 
-
+extern const uint8_t int_svr_code[];
+uint32_t (*sys_call)(uint32_t no, ...);
 
 
 
 void main()
 {
+	int i;
+
+	/*初始化plic*/
+	*plic_enable_0_31 =   1 << CDR_INT_TX0END
+						| 1 << CDR_INT_TX1END
+
+						| 1 << CDR_INT_RX0ERROR
+						| 1 << CDR_INT_RX1ERROR
+
+						| 1 << CDR_INT_RX0START
+						| 1 << CDR_INT_RX1START
+
+						| 1 << CDR_INT_RX0END
+						| 1 << CDR_INT_RX1END
+
+						//| 1 << CDR_INT_TX0_FIFO_DEQ
+						//| 1 << CDR_INT_TX1_FIFO_DEQ
+
+						| 1 << CDR_INT_RX0_FIFO_ENQ
+						| 1 << CDR_INT_RX1_FIFO_ENQ
+						;
+
+	plic_priority[CDR_INT_TX0END] = 1;
+	plic_priority[CDR_INT_TX1END] = 1;
+	plic_priority[CDR_INT_RX0ERROR] = 1;
+	plic_priority[CDR_INT_RX1ERROR] = 1;
+	plic_priority[CDR_INT_RX0START] = 1;
+	plic_priority[CDR_INT_RX1START] = 1;
+	plic_priority[CDR_INT_RX0END] = 1;
+	plic_priority[CDR_INT_RX1END] = 1;
+	plic_priority[CDR_INT_TX0_FIFO_DEQ] = 1;
+	plic_priority[CDR_INT_TX1_FIFO_DEQ] = 1;
+	plic_priority[CDR_INT_RX0_FIFO_ENQ] = 1;
+	plic_priority[CDR_INT_RX1_FIFO_ENQ] = 1;
+	*plic_threshold_0 = 0;
+
+	sys_call = (void *)int_svr_code;
+
+
+	//复位脉冲
+	*tx0_softReset = 1;
+	*tx1_softReset = 1;
+	*rx0_softReset = 1;
+	*rx1_softReset = 1;
+
+
+	//tx0   下行
+	//tx1	上行
+	//rx0	下行
+	//rx1	上行
+
+
+	while (1);
+
+
+
+#if 0
 	register uint32_t readDat;
 	register uint32_t operator;
 	register uint32_t downRecvLen;
@@ -447,7 +458,7 @@ void main()
 			// error();
 		}		
 	}
-
+#endif
 
 
 }
diff --git a/tb/sw/src/mstStartup.S b/tb/sw/src/mstStartup.S
index f699552..5cc4a22 100644
--- a/tb/sw/src/mstStartup.S
+++ b/tb/sw/src/mstStartup.S
@@ -65,234 +65,3 @@ _prog_start:
 	call main
 
 	ecall
-
-
-#if 0
-
-.balign 32
-.section .trap_entry, "ax", %progbits
-trap_entry:
-
-	addi	sp,sp,-136
-	sw	ra,4(sp)
-	sw	sp,8(sp)
-	sw	gp,12(sp)
-	sw	tp,16(sp)
-	sw	t0,20(sp)
-	sw	t1,24(sp)
-	sw	t2,28(sp)
-	sw	s0,32(sp)
-	sw	s1,36(sp)
-	sw	a0,40(sp)
-	sw	a1,44(sp)
-	sw	a2,48(sp)
-	sw	a3,52(sp)
-	sw	a4,56(sp)
-	sw	a5,60(sp)
-#ifdef __RV32I_MARCH__
-	sw	a6,64(sp)
-	sw	a7,68(sp)
-	sw	s2,72(sp)
-	sw	s3,76(sp)
-	sw	s4,80(sp)
-	sw	s5,84(sp)
-	sw	s6,88(sp)
-	sw	s7,92(sp)
-	sw	s8,96(sp)
-	sw	s9,100(sp)
-	sw	s10,104(sp)
-	sw	s11,108(sp)
-	sw	t3,112(sp)
-	sw	t4,116(sp)
-	sw	t5,120(sp)
-	sw	t6,124(sp)
-#endif
-
-#if 0
-    csrr t0, mstatus            # 读取 mstatus 寄存器
-    andi t0, t0, ~(1 << 3)      # 清除 MIE 位 (全局中断禁用)
-    csrw mstatus, t0            # 写回 mstatus 寄存器
-#endif
-
-	call plic_handle
-
-#if 0
-	csrr t0, mstatus
-	ori t0, t0, 1<<3
-	csrw mstatus, t0
-#endif
-
-	lw	ra,4(sp)
-	lw	sp,8(sp)
-	lw	gp,12(sp)
-	lw	tp,16(sp)
-	lw	t0,20(sp)
-	lw	t1,24(sp)
-	lw	t2,28(sp)
-	lw	s0,32(sp)
-	lw	s1,36(sp)
-	lw	a0,40(sp)
-	lw	a1,44(sp)
-	lw	a2,48(sp)
-	lw	a3,52(sp)
-	lw	a4,56(sp)
-	lw	a5,60(sp)
-#ifdef __RV32I_MARCH__
-	lw	a6,64(sp)
-	lw	a7,68(sp)
-	lw	s2,72(sp)
-	lw	s3,76(sp)
-	lw	s4,80(sp)
-	lw	s5,84(sp)
-	lw	s6,88(sp)
-	lw	s7,92(sp)
-	lw	s8,96(sp)
-	lw	s9,100(sp)
-	lw	s10,104(sp)
-	lw	s11,108(sp)
-	lw	t3,112(sp)
-	lw	t4,116(sp)
-	lw	t5,120(sp)
-	lw	t6,124(sp)
-#endif
-	addi	sp,sp,136
-
-	mret
-
-#.macro define_const name, value
-#    .equ \name, \value
-#.endm
-## 使用宏定义常量
-#define_const CDR_INT_TXEND, 	14
-
-opt_trap_entry:
-
-	addi	sp,sp,-136
-
-	#sw	ra,4(sp)
-	#sw	sp,8(sp)
-	#sw	gp,12(sp)
-	#sw	tp,16(sp)
-
-	sw	t0,20(sp)
-	sw	t1,24(sp)
-	#sw	t2,28(sp)
-	sw	s0,32(sp)
-	sw	s1,36(sp)
-
-	#sw	a0,40(sp)
-	#sw	a1,44(sp)
-	#sw	a2,48(sp)
-	#sw	a3,52(sp)
-	#sw	a4,56(sp)
-	#sw	a5,60(sp)
-	#sw	a6,64(sp)
-	#sw	a7,68(sp)
-	#sw	s2,72(sp)
-	#sw	s3,76(sp)
-	#sw	s4,80(sp)
-	#sw	s5,84(sp)
-	#sw	s6,88(sp)
-	#sw	s7,92(sp)
-	#sw	s8,96(sp)
-	#sw	s9,100(sp)
-	#sw	s10,104(sp)
-	#sw	s11,108(sp)
-	#sw	t3,112(sp)
-	#sw	t4,116(sp)
-	#sw	t5,120(sp)
-	#sw	t6,124(sp)
-
-#if 0
-    csrr t0, mstatus            # 读取 mstatus 寄存器
-    andi t0, t0, ~(1 << 3)      # 清除 MIE 位 (全局中断禁用)
-    csrw mstatus, t0            # 写回 mstatus 寄存器
-#endif
-
-	lui	t1, %hi(plic_claim)		
-	lw	t0, %lo(plic_claim)(t1)	# t0 = &plic_claim
-
-	lw  t1, 0(t0)				# t1 = *plic_claim
-	sw  t1, 0(t0)				# *plic_claim = t1
-
-	li	s0, CDR_INT_TXEND		
-
-	bne t1, s0, 1f				#_if (t1 != s0) goto 1f	
-
-	lui	s0,%hi(flag_intTxEnd)	#_else
-	li	s1,1
-	sw	s1,%lo(flag_intTxEnd)(s0)
-	j 4f
-
-1:
-	li  s0, CDR_INT_RXERROR
-	bne t1, s0, 2f				#_if (t1 != s0) goto 2f
-
-	lui	s0,%hi(flag_intRxError)	#_else
-	li	s1,1
-	sw	s1,%lo(flag_intRxError)(s0)
-	j 4f
-2:
-	li  s0, CDR_INT_RXSTART
-	bne t1, s0, 3f				#_if (t1 != s0) goto 3f
-
-	lui	s0,%hi(flag_intRxStart)	#_else
-	li	s1,1
-	sw	s1,%lo(flag_intRxStart)(s0)
-	j 4f
-
-3:
-	li  s0, CDR_INT_RXEND
-	bne t1, s0, 4f				#_if (t1 != s0) goto 4f
-
-	lui	s0,%hi(flag_intRxEnd)	#_else
-	li	s1,1
-	sw	s1,%lo(flag_intRxEnd)(s0)
-
-4:
-#if 0
-	csrr t0, mstatus
-	ori t0, t0, 1<<3
-	csrw mstatus, t0
-#endif
-
-	#lw	ra,4(sp)
-	#lw	sp,8(sp)
-	#lw	gp,12(sp)
-	#lw	tp,16(sp)
-	
-	lw	t0,20(sp)
-	lw	t1,24(sp)
-	#lw	t2,28(sp)
-	lw	s0,32(sp)
-	lw	s1,36(sp)
-
-	#lw	a0,40(sp)
-	#lw	a1,44(sp)
-	#lw	a2,48(sp)
-	#lw	a3,52(sp)
-	#lw	a4,56(sp)
-	#lw	a5,60(sp)
-	#lw	a6,64(sp)
-	#lw	a7,68(sp)
-	#lw	s2,72(sp)
-	#lw	s3,76(sp)
-	#lw	s4,80(sp)
-	#lw	s5,84(sp)
-	#lw	s6,88(sp)
-	#lw	s7,92(sp)
-	#lw	s8,96(sp)
-	#lw	s9,100(sp)
-	#lw	s10,104(sp)
-	#lw	s11,108(sp)
-	#lw	t3,112(sp)
-	#lw	t4,116(sp)
-	#lw	t5,120(sp)
-	#lw	t6,124(sp)
-
-	addi	sp,sp,136
-
-	mret
-
-#endif
-
diff --git a/tb/sw/src/slvStartup.S b/tb/sw/src/slvStartup.S
index 131545b..c564cdd 100644
--- a/tb/sw/src/slvStartup.S
+++ b/tb/sw/src/slvStartup.S
@@ -4,22 +4,12 @@
 #include "tl2cdr.h"
 
 .extern main
-.extern plic_handle
 .extern int_svr_code
 .extern plic_claim
-.extern flag_intTxEnd
-.extern flag_intRxError
-.extern flag_intRxStart
-.extern flag_intRxEnd
 
 .globl _prog_start
 .section .text.init
-
-
 _prog_start:
-
-
-
 	li x1,  0
 	li x2,  0
 	li x3,  0
@@ -55,19 +45,14 @@ _prog_start:
 #endif
 	li sp, 0x40011000
 
+	li 	a0, 0
+
 	lui t0, %hi(plic_claim)
-	lw 	a0, %lo(plic_claim)(t0)
+	lw 	a1, %lo(plic_claim)(t0)
 
-
-	la a1, flag_intTxEnd
-	la a2, flag_intRxError
-	la a3, flag_intRxStart
-	la a4, flag_intRxEnd
-	
 	call int_svr_code
 	mv t0, a0					#这里选择不同的trap_entry服务函数,这个是RV32I的代码
 
-	#la t0, trap_entry			#这个是最初版的trap_entry，仅做了RV32E的改造
 	csrw mtvec, t0
 	li t0, 1 << 11
 	csrw mie, t0
@@ -80,85 +65,3 @@ _prog_start:
 
 	ecall
 
-
-
-.balign 32
-.section .trap_entry, "ax", %progbits
-trap_entry:
-
-	addi	sp,sp,-136
-	sw	ra,4(sp)
-	sw	sp,8(sp)
-	sw	gp,12(sp)
-	sw	tp,16(sp)
-	sw	t0,20(sp)
-	sw	t1,24(sp)
-	sw	t2,28(sp)
-	sw	s0,32(sp)
-	sw	s1,36(sp)
-	sw	a0,40(sp)
-	sw	a1,44(sp)
-	sw	a2,48(sp)
-	sw	a3,52(sp)
-	sw	a4,56(sp)
-	sw	a5,60(sp)
-#ifdef __RV32I_MARCH__
-	sw	a6,64(sp)
-	sw	a7,68(sp)
-	sw	s2,72(sp)
-	sw	s3,76(sp)
-	sw	s4,80(sp)
-	sw	s5,84(sp)
-	sw	s6,88(sp)
-	sw	s7,92(sp)
-	sw	s8,96(sp)
-	sw	s9,100(sp)
-	sw	s10,104(sp)
-	sw	s11,108(sp)
-	sw	t3,112(sp)
-	sw	t4,116(sp)
-	sw	t5,120(sp)
-	sw	t6,124(sp)
-#endif
-
-	call plic_handle
-
-	lw	ra,4(sp)
-	lw	sp,8(sp)
-	lw	gp,12(sp)
-	lw	tp,16(sp)
-	lw	t0,20(sp)
-	lw	t1,24(sp)
-	lw	t2,28(sp)
-	lw	s0,32(sp)
-	lw	s1,36(sp)
-	lw	a0,40(sp)
-	lw	a1,44(sp)
-	lw	a2,48(sp)
-	lw	a3,52(sp)
-	lw	a4,56(sp)
-	lw	a5,60(sp)
-#ifdef __RV32I_MARCH__
-	lw	a6,64(sp)
-	lw	a7,68(sp)
-	lw	s2,72(sp)
-	lw	s3,76(sp)
-	lw	s4,80(sp)
-	lw	s5,84(sp)
-	lw	s6,88(sp)
-	lw	s7,92(sp)
-	lw	s8,96(sp)
-	lw	s9,100(sp)
-	lw	s10,104(sp)
-	lw	s11,108(sp)
-	lw	t3,112(sp)
-	lw	t4,116(sp)
-	lw	t5,120(sp)
-	lw	t6,124(sp)
-#endif
-	addi	sp,sp,136
-
-
-
-	mret
-
diff --git a/tb/sw/src/slvSvr.S b/tb/sw/src/slvSvr.S
index 13e538f..510e9c5 100644
--- a/tb/sw/src/slvSvr.S
+++ b/tb/sw/src/slvSvr.S
@@ -1,65 +1,213 @@
 #include "tl2cdr.h"
+#include "sysDef.h"
+
+#if 0
+/*
+其他代码全部使用RV32E编译，仅此代码采用 RV32I 编译，故而可以使用x0, x16~x31寄存器
+为了方便，不再使用ABI中的别名，直接使用x0, x16~x31；x1~x15使用ABI中定义的别名
+
+x16~x23, 作为临时寄存器使用
+
+
+x24, TL2CDR_BASE
+
+x25, 接收数据的存储地址，第一个4字节接收数据的长度，往后都是数据
+
+x26, 当前需要发送的数据的地址，第一个4个字节是长度(写入tx0_txLen)、第二开始是数据
+x27, 需要发送的数据长度
+
+x28, plic_claim的地址，用于读取当前正在服务的中断号，清除中断号
+x29, REG_ISR_ADDR 中断服务子程序入口
+
+x30, 最小的服务中断号
+x31, 最大的服务中断号
+*/
+
+#endif
+
+#define REG_TL2CDR_BASE 	x24 
+#define REG_rx_data			x25
+#define REG_tx_data			x26
+#define REG_tx_data_len 	x27
+#define REG_plic_claim		x28
+#define REG_ISR_ADDR		x29
+#define REG_min_isr_num 	x30
+#define REG_max_isr_num		x31
+
+#define REG_4				x23
 
 .globl _prog_start
 .globl _rv32i_plic_handle
 
 .section .text.init, "ax", %progbits
 
-#if 0
-#其他代码全部使用RV32E编译，仅此代码采用 RV32I 编译，故而可以使用x0, x16~x31寄存器
-#为了方便，不再使用ABI中的别名，直接使用x0, x16~x31；x1~x15使用ABI中定义的别名
-#endif
-
 _prog_start:
-	li		x16, 0
+	//a0 call_function no
+	li		x16, SYS_INIT
+	beqz 	 a0, init_system_func  //初始化系统，输入必要的地址信息，返回 中断程序 的地址
 	
-	mv 		x17, a0 # plic_claim
-	mv 		x18, a1 # flag_intTxEnd
-	mv 		x19, a2 # flag_intRxError
-	mv 		x20, a3 # flag_intRxStart
-	mv 		x21, a4 # flag_intRxEnd
-	mv 		x22, x0
+	li	 	x16, SYS_SEND_DATA
+	beq	 	 a0, x16, send_data_func
 
-	#lui 	x23, %hi(_rv32i_plic_handle)
-	#lw		x24, %lo(_rv32i_plic_handle)(x23)
+	li		x16, SYS_SET_RECV_INFO
+	beq		 a0, x16, set_recv_info_func
+
+10: j		10b	//死循环，输入错误的功能号
+	ret			//心理安慰，并不会返回
 	
-	la		x24, _rv32i_plic_handle
-	
-	li		x25, 1
-	li		x26, 0
-	li		x27, 0
-	li		x28, CDR_INT_TXEND
-	li		x29, CDR_INT_RXERROR
-	li		x30, CDR_INT_RXSTART
-	li		x31, CDR_INT_RXEND
 
-    mv		a0, x24
+//初始化系统，输入必要的地址信息，返回中断程序的地址
+//a1, plic_claim的地址, 其实也可以不用传送
+init_system_func:
+	mv		REG_plic_claim, a1 # plic_claim
 
-	li		x23, 0
-	li		x24, 0
+	la		x17, _rv32i_plic_handle
+    mv		a0, x17
+
+	li		REG_TL2CDR_BASE, 	TL2CDR_BASE
+	la		REG_ISR_ADDR, 		isr_hdl_table
+	li		REG_min_isr_num, 	14
+	li		REG_max_isr_num, 	25
+	li		REG_4,				4
+
+	li		x21,				0
     ret
 
+//主站启动发送数据
+//完全依靠中断搬运
+
+//a1, 当前需要发送的数据的地址
+//a2, 当前数据发送的长度
+//a3, dummy
+//a4, dummy
+send_data_func:
+	mv		REG_tx_data, 	 a1
+	mv 		REG_tx_data_len, a2
+
+//*tx0_txLen = 8 + tx_len;  //前导+长度命令
+	mv		x16, a2
+	addi	x17, x16, 8
+	sw		x17, TX0_WriteTxLen(REG_TL2CDR_BASE)
+
+//*tx0_txFifo = (tx_len << 20) | (0 << 16) | 0x0000;
+	slli	x17, x16, 20
+	sw		x17, TX0_WriteTxFifo(REG_TL2CDR_BASE)
+
+//*tx0_txFifo = data[0]
+	#lw		x17, 0(REG_tx_data)
+	#sw		x17, TX0_WriteTxFifo(REG_TL2CDR_BASE)
+
+	#add		REG_tx_data, REG_tx_data, REG_4
+	#sub		REG_tx_data_len, REG_tx_data_len, REG_4
+	
+	li		a0,  1
+	ret
+
+//设置接收数据的地址,第一个接收数据的长度，往后都是数据
+//a1, 设置接收数据的缓冲区
+set_recv_info_func:
+	mv		REG_rx_data, 	a1
+	li		a0, 1
+	ret
+
+//--------------------------------------------
+//这是中断程序开始的地方
+
 	.balign 32
 _rv32i_plic_handle:
-	lw 		x23, 0(x17)    			# x23 = *plic_claim
-	sw  	x23, 0(x17)				# *plic_claim = x23
+	lw 		x16, 0(REG_plic_claim)    			# x16 = *plic_claim
+	sw  	x16, 0(REG_plic_claim)				# *plic_claim = x16
 
-	bne 	x23, x28, 1f   			#_if (x23 != x24) goto 1f
-	sw		x25, 0(x18)				#_else
-	j 		4f
+	bltu	x16, REG_min_isr_num, exit_handle	#if x16 < REG_min_isr_num then goto exit_handle
+	bltu	REG_max_isr_num, x16, exit_handle	#if REG_max_isr_num < x16 then goto exit_handle
+	sub 	x17, x16, REG_min_isr_num
+	slli	x17, x17, 2							# x17 = x17 * 4
+	add		x18, REG_ISR_ADDR, x17				# x18 = REG_ISR_ADDR + x17
+	jr		x18
 
-1:
-	bne 	x23, x29, 2f   			#_if (x23 != x24) goto 2f
-	sw		x25, 0(x19)				#_else
-	j 		4f
-
-2:
-	bne 	x23, x30, 3f			#_if (x23 != x24) goto 3f
-	sw		x25, 0(x20)				#_else
-	j 		4f
-
-3:
-	bne 	x23, x31, 4f			#_if (x23 != x24) goto 4f
-	sw		x25, 0(x21)				#_else
-4:
+exit_handle:
 	mret
+
+isr_tx0_end_hdl:
+	#li	x17, 1
+	#sw	x17, TX0_WriteSoftReset(REG_TL2CDR_BASE)
+	mret
+
+isr_tx1_end_hdl:
+	#li	x17, 1
+	#sw	x17, TX0_WriteSoftReset(REG_TL2CDR_BASE)
+	mret
+
+isr_rx0_err_hdl:
+1:	j 1b
+	mret
+
+isr_rx1_err_hdl:
+1:	j 1b
+	mret
+
+isr_rx0_start_hdl:
+	mret
+
+isr_rx1_start_hdl:
+#if 0
+	lw		x22, RX1_ReadRxLen(REG_TL2CDR_BASE)
+	sw		x22, 0(REG_rx_data)
+	add		REG_rx_data, REG_rx_data, REG_4
+#endif
+	mret
+
+isr_rx0_end_hdl:
+	mret
+
+isr_rx1_end_hdl:
+	mret
+
+isr_tx0_deq_hdl:
+#if 0
+	beqz	REG_tx_data_len, 1f //if (REG_tx_data_len > 0)
+	lw		x17, 0(REG_tx_data)
+	sw		x17, TX0_WriteTxLen(REG_TL2CDR_BASE)
+
+	add		REG_tx_data, REG_tx_data, REG_4
+	sub		REG_tx_data_len, REG_tx_data_len, REG_4
+1:
+#endif
+	mret
+
+isr_tx1_deq_hdl:
+	mret
+
+isr_rx0_enq_hdl:
+	lw		x17, RX0_ReadRxFifo(REG_TL2CDR_BASE)
+	bnez 	x21, 1f
+	srli	x16, x17, 20
+	li		x18, 8
+	add		x16, x16, x18
+	sw		x16, TX1_WriteTxLen(REG_TL2CDR_BASE)
+1:
+	add		x21, x21, REG_4
+	sw		x17, TX1_WriteTxFifo(REG_TL2CDR_BASE)
+	mret
+
+isr_rx1_enq_hdl:
+#if 0
+	lw		x17, RX1_ReadRxFifo(REG_TL2CDR_BASE)
+	sw		x17, 0(REG_rx_data)
+	add		REG_rx_data, REG_rx_data, REG_4
+#endif
+	mret
+
+isr_hdl_table:
+	j isr_tx0_end_hdl
+	j isr_tx1_end_hdl
+	j isr_rx0_err_hdl
+	j isr_rx1_err_hdl
+	j isr_rx0_start_hdl
+	j isr_rx1_start_hdl
+	j isr_rx0_end_hdl
+	j isr_rx1_end_hdl
+	j isr_tx0_deq_hdl
+	j isr_tx1_deq_hdl
+	j isr_rx0_enq_hdl
+	j isr_rx1_enq_hdl
diff --git a/tb/sw/tl2cdr/tl2cdr.h b/tb/sw/tl2cdr/tl2cdr.h
index 29f1f98..233b637 100644
--- a/tb/sw/tl2cdr/tl2cdr.h
+++ b/tb/sw/tl2cdr/tl2cdr.h
@@ -7,28 +7,6 @@
 
 #define TL2CDR_BASE             0x10000000U
 
-
-#define OLD_CODE
-#ifdef OLD_CODE
-#define CDR_ReadStatus          0x00U
-#define CDR_WriteTxLen          0x04U
-#define CDR_WriteTxFifo         0x08U
-#define CDR_WriteTransDir       0x0cU
-#define CDR_WriteSoftReset      0x10U
-#define CDR_ReadRxLen           0x18U
-#define CDR_ReadRxFifo          0x1cU
-#define CDR_ReadIsLast          0x20U
-#define CDR_ReadTxCrc           0x24U
-#define CDR_ReadRxCrc           0x28U
-#define CDR_WriteLimitTimer     0x2cU
-
-#define CDR_INT_TXEND           14U
-#define CDR_INT_RXERROR         15U
-#define CDR_INT_RXSTART         16U
-#define CDR_INT_RXEND           17U
-#endif
-
-
 #define CDR_INT_TX0END          14U
 #define CDR_INT_TX1END          15U
 #define CDR_INT_RX0ERROR        16U
@@ -37,13 +15,11 @@
 #define CDR_INT_RX1START        19U
 #define CDR_INT_RX0END          20U
 #define CDR_INT_RX1END          21U
-#define CDR_INT_TX0_FIFO_DEQ    22U          
+#define CDR_INT_TX0_FIFO_DEQ    22U
 #define CDR_INT_TX1_FIFO_DEQ    23U
 #define CDR_INT_RX0_FIFO_ENQ    24U
 #define CDR_INT_RX1_FIFO_ENQ    25U
 
-
-
 #define TX0_WriteSoftReset      0x00U
 #define TX0_WriteTxLen          0x04U
 #define TX0_WriteTxFifo         0x08U
@@ -73,19 +49,6 @@
 
 
 #ifndef __ASSEMBLER__
-#ifdef OLD_CODE
-extern volatile uint32_t * const cdr_status;
-extern volatile uint32_t * const cdr_txLen;
-extern volatile uint32_t * const cdr_txFifo;
-extern volatile uint32_t * const cdr_direct;
-extern volatile uint32_t * const cdr_softReset;
-extern volatile uint32_t * const cdr_rxLen;
-extern volatile uint32_t * const cdr_rxFifo;
-extern volatile uint32_t * const cdr_IsLast;
-extern volatile uint32_t * const cdr_rxCrc;
-extern volatile uint32_t * const cdr_txCrc;
-#endif
-
 extern volatile uint32_t * const tx0_softReset;
 extern volatile uint32_t * const tx0_txLen;
 extern volatile uint32_t * const tx0_txFifo;