From 9322f63bc55ec2b3f13dc282a30cca4680e0f78c Mon Sep 17 00:00:00 2001 From: RuigeLee Date: Thu, 6 Jul 2023 22:11:49 +0800 Subject: [PATCH] =?UTF-8?q?=E8=B7=A8=E6=97=B6=E9=92=9F=E5=9F=9F=E6=9C=89?= =?UTF-8?q?=E4=B8=A5=E9=87=8D=E8=AE=BE=E8=AE=A1=E7=BC=BA=E9=99=B7?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/main/scala/mac/MAC.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main/scala/mac/MAC.scala b/src/main/scala/mac/MAC.scala index 9f9f426..e9d0adc 100644 --- a/src/main/scala/mac/MAC.scala +++ b/src/main/scala/mac/MAC.scala @@ -655,7 +655,7 @@ val rxethmac = Module(new MacRx) val WillTransmit_q = ShiftRegister(WillTransmit, 2, false.B, true.B) Transmitting := ~r_FullD & WillTransmit_q - RxEnSync := RegEnable(r_RxEn, false.B, ~io.mrxdv_pad_i) + RxEnSync := RegEnable( ShiftRegister(r_RxEn, 2), false.B, ~io.mrxdv_pad_i) }