Merge branch 'feature/8b10b' into mp_eb_dev

src/main/scala/backBoard/shin/MstSlvSwitch.scala

@@ -58,9 +58,15 @@ abstract class MstSlvSwitchBase extends Module with RequireAsyncReset{
   val slaveParser  = Module(new SlaveParser )
   val masterParser = Module(new MasterParser)
 
+  val b4b5DownEncoder = Module(new b4b5DualEncode)
+  val b4b5DownDecoder = Module(new b4b5DualDecode)
+  val b4b5UpEncoder = Module(new b4b5DualEncode)
+  val b4b5UpDecoder = Module(new b4b5DualDecode)
 
-
-
+  val b8b10DownEncoder = Module(new b8b10Encode)
+  val b8b10DownDecoder = Module(new b8b10Decode)
+  val b8b10UpEncoder = Module(new b8b10Encode)
+  val b8b10UpDecoder = Module(new b8b10Decode)
 
 
   val interface = Module(new Interface)
@@ -504,15 +510,9 @@ trait MstSlvSwitchWatchDog{ this: MstSlvSwitchBase =>
 
 }
 
-
-
-class MstSlvSwitch extends MstSlvSwitchBase
-with MstSlvSwitchMaster
-with MstSlvSwitchSlave
-with MstSlvSwitchWatchDog{
+trait MstSlvSwitchDataPath{ this: MstSlvSwitchBase =>
   val isDwUpEx = interface.io.cReg.dwupEx(15,8) === "h58".U && interface.io.cReg.dwupEx.extract(0)
 
-
   when( ~isDwUpEx ){ //未交叉
     when( interface.io.cReg.modeSel === false.B ){ //slave
       when( (slaveParser.io.intHWTrig(0) | slaveParser.io.intHWTrig(1)) | interface.io.isPoReset ){ //硬件错误
@@ -579,6 +579,49 @@ with MstSlvSwitchWatchDog{
       io.dDatOut := false.B
     }
   }
+}
+
+trait MstSlvSwitchB8B4{ this: MstSlvSwitchBase =>
+  val isUsing8b10b = interface.io.cReg.b8b4Sel(15,8) === "h59".U && interface.io.cReg.b8b4Sel.extract(0)
+
+  when( isUsing8b10b ){
+    b8b10DownEncoder.io <> io.downCDROut.encode
+    b8b10DownDecoder.io <> io.downCDRIn.decode
+    b8b10UpEncoder.io   <> io.upCDROut.encode
+    b8b10UpDecoder.io   <> io.upCDRIn.decode
+
+    b4b5DownEncoder.io.isEnable := false.B
+    b4b5DownEncoder.io.dataIn := 0.U
+    b4b5DownDecoder.io.dataIn := 0.U
+    b4b5UpEncoder.io.isEnable := false.B
+    b4b5UpEncoder.io.dataIn := 0.U
+    b4b5UpDecoder.io.dataIn := 0.U
+  } .otherwise{
+    b4b5DownEncoder.io <> io.downCDROut.encode
+    b4b5DownDecoder.io <> io.downCDRIn.decode
+    b4b5UpEncoder.io <> io.upCDROut.encode
+    b4b5UpDecoder.io <> io.upCDRIn.decode
+
+    b8b10DownEncoder.io.isEnable := false.B
+    b8b10DownEncoder.io.dataIn := 0.U
+    b8b10DownDecoder.io.dataIn := 0.U
+    b8b10UpEncoder.io.isEnable := false.B
+    b8b10UpEncoder.io.dataIn := 0.U
+    b8b10UpDecoder.io.dataIn := 0.U
+  }
+}
+
+class MstSlvSwitch extends MstSlvSwitchBase
+with MstSlvSwitchMaster
+with MstSlvSwitchSlave
+with MstSlvSwitchWatchDog
+with MstSlvSwitchDataPath
+with MstSlvSwitchB8B4{
+
+
+
+
+