1SRAM加入仿真随机初始化；2CDR物理层重新对齐包头 3复制粘贴变量错误

src/main/scala/backBoard/ebus/CDRIn.scala

@@ -91,9 +91,9 @@ trait CDRInAxis{ this: CDRInBase =>
   val shiftData = RegInit(0.U(8.W)); shiftData := Cat(shiftData(6,0), syncSerDat)
 
   val header = Reg(UInt((8*HeaderByte).W))
-  val payloadLen = header(31,16)
-  val operation  = header(15,8)
-  val param      = header( 7,0)
+  val payloadLen = header(63,52)
+  val operation  = header(51,48)
+  val param      = header(47, 0)
 
   val isArbLock: Bool
   val checkSFD = ShiftRegister( shiftData, 8 )