diff --git a/tb/shinTest/ShinTopSpiTb.v b/tb/shinTest/ShinTopSpiTb.v
index c1f3a96..1ce6724 100644
--- a/tb/shinTest/ShinTopSpiTb.v
+++ b/tb/shinTest/ShinTopSpiTb.v
@@ -456,13 +456,13 @@ always @(negedge reset) begin
   _reset_deactive <= 1'b1;
 end
 
-  `define SCKFRE #640
+  `define SCKFRE 640
 
   reg sck = 0;
   
   initial begin
       forever begin 
-        `SCKFRE sck <= ~sck;
+        #`SCKFRE sck <= ~sck;
       end
   end
 
@@ -558,6 +558,16 @@ always @(negedge sck) begin
   end
 end
 
+//输入
+always @(negedge sck) begin
+  if( isBusy ) begin
+    if( transCnt == length & &bitCnt ) begin
+      isBusy       <= #(`SCKFRE/2) 1'b0;
+      spi_csn[idx] <= #(`SCKFRE/2) 1'b1;
+    end
+  end
+end
+
 //输入
 always @(posedge sck) begin
   if( isBusy ) begin
@@ -600,9 +610,6 @@ always @(posedge sck) begin
           exChangeRegi <= isQspi ? {exChangeRegi[3:0], qspi_mux_miso} : {exChangeRegi[6:0], spi_mux_miso};
         end
       end
-    end else begin
-      isBusy       <= #5 1'b0;
-      spi_csn[idx] <= #5 1'b1;
     end
   end
 end