From 7bc3136790ab9c41161c91542ded69610ce93c1b Mon Sep 17 00:00:00 2001 From: RuigeLee Date: Sun, 14 Apr 2024 20:33:10 +0800 Subject: [PATCH] =?UTF-8?q?=E5=A4=84=E7=90=86=E5=AE=8CIO=E4=BA=9A=E7=A8=B3?= =?UTF-8?q?=E6=80=81=E9=97=AE=E9=A2=98=EF=BC=8C=E6=B5=8B=E8=AF=95=E5=AE=8C?= =?UTF-8?q?=E6=88=90?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/main/scala/backBoard/LocalRegisters.scala | 28 +++++++++---------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/src/main/scala/backBoard/LocalRegisters.scala b/src/main/scala/backBoard/LocalRegisters.scala index ae7c3c8..98c8205 100644 --- a/src/main/scala/backBoard/LocalRegisters.scala +++ b/src/main/scala/backBoard/LocalRegisters.scala @@ -126,19 +126,17 @@ trait BackBoardSlvIn { this: BackBoardSlvLocal => def gp: Int - val flitNum = 32 - require(flitNum <= 128) val in = IO(Input(UInt((8*gp).W))) - val flitCnt = RegInit(MixedVecInit(Seq( 0.U(1.W), 0.U((log2Ceil(256/flitNum)).W), 0.U(1.W), 0.U(1.W), 0.U(1.W), 0.U(1.W), 0.U(1.W), 0.U(1.W), 0.U(1.W)) )) + val flitCnt = RegInit(MixedVecInit(Seq( 0.U(1.W), 0.U((log2Ceil(256/32)).W), 0.U(1.W), 0.U(1.W), 0.U(1.W), 0.U(1.W), 0.U(1.W), 0.U(1.W), 0.U(1.W)) )) val flitTrigger = Wire(Vec(9, Bool())) flitTrigger(0) := ~RegNext(flitTrigger(0)) // flitTrigger(1) := usTrigger - flitTrigger(1) := flitCnt(1) >= (256/flitNum-1).U + flitTrigger(1) := flitCnt(1) >= (256/32-1).U when( ~RegNext(usTrigger) & usTrigger ){ when( flitTrigger(1) ){ flitCnt(1) := 0.U @@ -197,33 +195,35 @@ trait BackBoardSlvIn { this: BackBoardSlvLocal => for( i <- 0 until 8 ) { - val flitter = RegInit(VecInit( Seq.fill(flitNum){false.B})) - val flitHi = RegInit(0.U((log2Ceil(flitNum+1)).W)) + val flitter = RegInit(VecInit( Seq.fill(32){false.B})) + val flitHi = RegInit(0.U((log2Ceil(32)).W)) ( 0 until 9 ).map{ k => when( digitalFilter === k.U ){ when( (if( k == 0 ){ true.B } else {~RegNext(flitTrigger(k)) & flitTrigger(k)}) ){ flitter(0) := in(i+8*j) - (1 until flitNum).map{ k => + (1 until 32).map{ k => flitter(k) := flitter(k-1) } - when( (~flitter(flitNum-1) & ~in(i+8*j)) | (flitter(flitNum-1) & in(i+8*j)) ){ + when( (~flitter(31) & ~flitter(0)) | (flitter(31) & flitter(0)) ){ flitHi := flitHi - } .elsewhen( ~flitter(flitNum-1) & in(i+8*j) ){ + } .elsewhen( ~flitter(31) & flitter(0) ){ flitHi := flitHi + 1.U - } .elsewhen( flitter(flitNum-1) & ~in(i+8*j) ){ + } .elsewhen( flitter(31) & ~flitter(0) ){ flitHi := flitHi - 1.U } - when( flitHi >= (flitNum*4/5).U ){ + when( flitHi >= 26.U ){ digitalIn(i) := true.B - } .elsewhen( flitHi <= (flitNum/5).U ){ + } .elsewhen( flitHi <= 6.U ){ digitalIn(i) := false.B } - assert( flitHi <= flitNum.U ) - assert( flitter.count( (k:Bool) => k === true.B ) === flitHi ) + val fliterCnt = WireDefault( VecInit( (1 until 32).map{ k => flitter(k) }) ) + + assert( flitHi <= 31.U ) + assert( fliterCnt.count( (k:Bool) => k === true.B ) === flitHi ) } }