编译通过 仿真启动 请知悉 改处理器没有csr

This commit is contained in:
RuigeLee
2024-10-25 17:46:21 +08:00
parent 4737700f56
commit 78d54d2083
20 changed files with 880 additions and 69 deletions

78
tb/sw/axi_uart/uart.c Normal file
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@@ -0,0 +1,78 @@
#include <stdint.h>
#include "uart.h"
#ifndef UART_BASE
#error UART Base address not define!!!
#endif
volatile uint32_t *uart_rfifo = (uint32_t*)( UART_BASE + RX_FIFO );
volatile uint32_t *uart_tfifo = (uint32_t*)( UART_BASE + TX_FIFO );
volatile uint32_t *uart_status = (uint32_t*)( UART_BASE + STAT_REG );
volatile uint32_t *uart_ctrl = (uint32_t*)( UART_BASE + CTRL_REG );
int32_t uart_init()
{
//reset rx & tx fifo, disable interrupt
(*uart_status) = 0x03;
(*uart_status) = 0x00;
return 0;
}
int32_t uart_sendByte( uint8_t data )
{
#if(1)
//wait unitl tx fifo not full
while( ((*uart_status) & 0x08) != 0);
*uart_tfifo = data;
#else
(*(volatile uint32_t*)(0x60000000)) = data;
#endif
return 0;
}
uint8_t uart_recByte()
{
//wait unitl rx fifo has data
while( ((*uart_status) & 0x01) == 0);
return (uint8_t)(*uart_rfifo);
}
int32_t print_uart(const char *str)
{
const char *cur = &str[0];
while (*cur != '\0')
{
uart_sendByte((uint8_t)*cur);
cur++;
}
return 0;
}

26
tb/sw/axi_uart/uart.h Normal file
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#ifndef _UART_H_
#define _UART_H_
#include <stdint.h>
#define UART_BASE 0x60000000U
#define RX_FIFO 0x0000
#define TX_FIFO 0x0004
#define STAT_REG 0x0008
#define CTRL_REG 0x000c
extern int32_t uart_init();
extern int32_t uart_sendByte( uint8_t data );
extern uint8_t uart_recByte();
extern int32_t print_uart(const char *str);
#endif