From 759218b57037de8850bb230246287769d54205f0 Mon Sep 17 00:00:00 2001 From: RuigeLee Date: Wed, 17 Sep 2025 17:29:19 +0800 Subject: [PATCH] =?UTF-8?q?=E4=BF=AE=E5=A4=8D=E5=BE=AE=E8=B0=83=E6=96=B9?= =?UTF-8?q?=E5=90=91?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/main/scala/backBoard/shin/SlaveParser.scala | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/main/scala/backBoard/shin/SlaveParser.scala b/src/main/scala/backBoard/shin/SlaveParser.scala index e4ff481..a36f43a 100644 --- a/src/main/scala/backBoard/shin/SlaveParser.scala +++ b/src/main/scala/backBoard/shin/SlaveParser.scala @@ -945,8 +945,8 @@ trait SlaveParserSync{ this: SlaveParserBase => ( isDownRecPing & downSubMsgHeadInfo(0).devIndex === 0.U & downSubMsgHeadInfo(0).operator === SUBMSG_OPERATOR_SYNCA ) | ( ~isDownRecPing & downSubMsgHeadInfo(1).devIndex === 0.U & downSubMsgHeadInfo(1).operator === SUBMSG_OPERATOR_SYNCA ) ){ - addr64_op1 := deltaFinal //组合逻辑 - addr64_op2 := subOp2(deltaFinalPre) //组合逻辑 + addr64_op1 := deltaFinalPre //组合逻辑 + addr64_op2 := subOp2(deltaFinal) //组合逻辑 addrConflict(4) := true.B //组合逻辑 deltaFinal := MuxCase( deltaFinalPre, Seq( //时序逻辑 ( addr64_res.asSInt < -10.S ) -> ( deltaFinal - 10.U ),