Merge branch 'ShinTop' into eb_dev

src/main/scala/backBoard/shin/SlaveParser.scala

@@ -70,6 +70,8 @@ class SlaveParserIO extends Bundle{
 
   val intHWTrig   = Output(Vec(2, Bool()))
   val intHWClr    = Input (Vec(2, Bool()))
+
+  val isRecWdtTrigger = Output(Bool())
 }
 
 abstract class SlaveParserBase extends Module{
@@ -705,8 +707,9 @@ trait SlaveParserProbe{ this: SlaveParserBase =>
 
 
   // val ProbeRecAim  = 511.U
-  val probeRecCnt = RegInit(0.U(9.W))
-  val isWatchDogOverflow = probeRecCnt.andR
+  val probeRecCnt = RegInit(0.U(32.W))
+  val isWatchDogOverflow = probeRecCnt === io.cReg.wdtTarCnt(0)
+  io.isRecWdtTrigger := isWatchDogOverflow
 
 
 
@@ -749,7 +752,7 @@ trait SlaveParserProbe{ this: SlaveParserBase =>
     probeRecCnt := 0.U
   } .elsewhen( isWatchDogOverflow ){
     probeRecCnt := 0.U
-  } .elsewhen( isReadyToProbe ){
+  } .elsewhen( isReadyToProbe & io.cReg.wdtEnable.extract(0) ){
     probeRecCnt := probeRecCnt + 1.U
   }