增加代码，将从站代码也改成RV32E和RV32I混合编程的版本

Makefile

@@ -74,6 +74,7 @@ sw:
 	rm ./tb/sw/build/* -f
 	mkdir -p ./tb/sw/build/
 
+#这是主站的中断服务程序，以及初始化程序
 	$(RVCC) -ggdb $(RV32I_MARCH) $(RV32I_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
 	-I ./tb/sw/ -I ./tb/sw/src \
 	-I ./tb/sw/tl2cdr \
@@ -87,12 +88,13 @@ sw:
 
 	$(TARGET)-objcopy -O binary ./tb/sw/build/mstSvr.elf  ./tb/sw/build/mstSvr.bin
 
-	python3 ./tb/sw/bin_2_c_array.py ./tb/sw/build/mstSvr.bin ./tb/sw/src/mstSvr.c
+	python3 ./tb/sw/bin_2_c_array.py ./tb/sw/build/mstSvr.bin ./tb/sw/build/mstSvr.c
 
+#这是主站的程序
 	$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
 	-I ./tb/sw/ -I ./tb/sw/src \
 	-I ./tb/sw/tl2cdr \
-	-c ./tb/sw/src/mstSvr.c \
+	-c ./tb/sw/build/mstSvr.c \
 	-o ./tb/sw/build/mstSvr.o
 
 	$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
@@ -126,24 +128,49 @@ sw:
 	$(TARGET)-objcopy -O verilog  ./tb/sw/build/mstTest.elf  ./tb/sw/build/mstTest.verilog
 	sed -i 's/@400/@000/g' ./tb/sw/build/mstTest.verilog
 
-	$(RVCC) -O3 -ggdb $(RV32I_MARCH) $(RV32I_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
+#这是从站的中断服务程序，以及初始化程序
+	$(RVCC) -ggdb $(RV32I_MARCH) $(RV32I_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
+	-I ./tb/sw/ -I ./tb/sw/src \
+	-I ./tb/sw/tl2cdr \
+	-c ./tb/sw/src/slvSvr.S \
+	-o ./tb/sw/build/slvSvr.o
+
+	$(RVCC) -ggdb $(RV32I_MARCH) $(RV32I_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
+	-T ./tb/sw/linker.lds \
+	./tb/sw/build/slvSvr.o \
+	-o ./tb/sw/build/slvSvr.elf
+
+	$(TARGET)-objcopy -O binary ./tb/sw/build/slvSvr.elf  ./tb/sw/build/slvSvr.bin
+
+	python3 ./tb/sw/bin_2_c_array.py ./tb/sw/build/slvSvr.bin ./tb/sw/build/slvSvr.c
+
+#这是从站的程序
+	$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
+	-I ./tb/sw/ -I ./tb/sw/src \
+	-I ./tb/sw/tl2cdr \
+	-c ./tb/sw/build/slvSvr.c \
+	-o ./tb/sw/build/slvSvr.o
+
+	$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
 	-I ./tb/sw/ -I ./tb/sw/src \
 	-I ./tb/sw/tl2cdr \
 	-c ./tb/sw/src/SlvMain.c \
 	-o ./tb/sw/build/slvMain.o
 
-	$(RVCC) -Os -ggdb $(RV32I_MARCH) $(RV32I_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
+	$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
 	-I ./tb/sw/ -I ./tb/sw/src \
+	-I ./tb/sw/tl2cdr \
 	-c ./tb/sw/src/slvStartup.S \
 	-o ./tb/sw/build/slvStartup.o
 
-	# $(RVCC) -Os -ggdb $(RV32I_MARCH) $(RV32I_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
+	# $(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
 	# -I ./tb/sw/ -I ./tb/sw/src \
 	# -c ./tb/sw/src/slvMain.S \
 	# -o ./tb/sw/build/slvMain.o
 
-	$(RVCC) -Os -ggdb $(RV32I_MARCH) $(RV32I_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
+	$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
 	-T ./tb/sw/linker.lds \
+	./tb/sw/build/slvSvr.o \
 	./tb/sw/build/slvStartup.o \
 	./tb/sw/build/slvMain.o \
 	-o ./tb/sw/build/slvTest.elf

tb/sw/bin_2_c_array.py

@@ -5,8 +5,8 @@ def bin_2_c_array_file(bin_file, c_file):
     with open(bin_file, 'rb') as bf, open(c_file, 'w') as cf:
         # 写入文件头
         cf.write('#include "stdint.h"\n')
-        #cf.write('const uint8_t mst_svr_code[] __attribute__((aligned(32), section(".trap_entry"))) = {\n')
+        #cf.write('const uint8_t int_svr_code[] __attribute__((aligned(32), section(".trap_entry"))) = {\n')
-        cf.write('const uint8_t mst_svr_code[] __attribute__((aligned(32))) = {\n')
+        cf.write('const uint8_t int_svr_code[] __attribute__((aligned(32))) = {\n')
 
         all_data = bf.read()
 

tb/sw/linker.lds

@@ -38,5 +38,5 @@ SECTIONS
     }
 
     /*. = 0x40000800;*/
-    .trap_entry : { *(.trap_entry)}
+    .trap_entry : ALIGN(0x100) { *(.trap_entry)}
 }

tb/sw/src/mstStartup.S

@@ -2,7 +2,7 @@
 
 .extern main
 .extern plic_handle
-.extern mst_svr_code
+.extern int_svr_code
 .extern plic_claim
 .extern flag_intTxEnd
 .extern flag_intRxError
@@ -71,7 +71,7 @@ _prog_start:
 	#lw a4, %lo(flag_intRxEnd)(t0)
 	la a4, flag_intRxEnd
 	
-	call mst_svr_code
+	call int_svr_code
 	mv t0, a0					#这里选择不同的trap_entry服务函数,这个是RV32I的代码
 
 	#la t0, trap_entry			#这个是最初版的trap_entry，仅做了RV32E的改造

tb/sw/src/mstSvr.S

@@ -31,7 +31,7 @@ _prog_start:
 	li		x28, CDR_INT_TXEND
 	li		x29, CDR_INT_RXERROR
 	li		x30, CDR_INT_RXSTART
-	li		x31, CDR_INT_RXSTART
+	li		x31, CDR_INT_RXEND
 
 
     mv		a0, x24

tb/sw/src/slvStartup.S

@@ -1,8 +1,17 @@
 
 
 
+#include "tl2cdr.h"
+
 .extern main
 .extern plic_handle
+.extern int_svr_code
+.extern plic_claim
+.extern flag_intTxEnd
+.extern flag_intRxError
+.extern flag_intRxStart
+.extern flag_intRxEnd
+
 .globl _prog_start
 .section .text.init
 
@@ -26,6 +35,7 @@ _prog_start:
 	li x13, 0
 	li x14, 0
 	li x15, 0
+#ifdef __RV32I_MARCH__
 	li x16, 0
 	li x17, 0
 	li x18, 0
@@ -42,14 +52,26 @@ _prog_start:
 	li x29, 0
 	li x30, 0
 	li x31, 0
+#endif
+	li sp, 0x40011000
 
-	la t0, trap_entry
+	lui t0, %hi(plic_claim)
+	lw 	a0, %lo(plic_claim)(t0)
+
+
+	la a1, flag_intTxEnd
+	la a2, flag_intRxError
+	la a3, flag_intRxStart
+	la a4, flag_intRxEnd
+	
+	call int_svr_code
+	mv t0, a0					#这里选择不同的trap_entry服务函数,这个是RV32I的代码
+
+	#la t0, trap_entry			#这个是最初版的trap_entry，仅做了RV32E的改造
 	csrw mtvec, t0
 	li t0, 1 << 11
 	csrw mie, t0
 
-	li sp, 0x40011000
-
 	csrr t0, mstatus
 	ori t0, t0, 1<<3
 	csrw mstatus, t0
@@ -80,6 +102,7 @@ trap_entry:
 	sw	a3,52(sp)
 	sw	a4,56(sp)
 	sw	a5,60(sp)
+#ifdef __RV32I_MARCH__
 	sw	a6,64(sp)
 	sw	a7,68(sp)
 	sw	s2,72(sp)
@@ -96,26 +119,10 @@ trap_entry:
 	sw	t4,116(sp)
 	sw	t5,120(sp)
 	sw	t6,124(sp)
-
+#endif
-
-
-
-    csrr t0, mstatus            # 读取 mstatus 寄存器
-    andi t0, t0, ~(1 << 3)      # 清除 MIE 位 (全局中断禁用)
-    csrw mstatus, t0            # 写回 mstatus 寄存器
-
-
 
 	call plic_handle
 
-	csrr t0, mstatus
-	ori t0, t0, 1<<3
-	csrw mstatus, t0
-
-
-
-
-
 	lw	ra,4(sp)
 	lw	sp,8(sp)
 	lw	gp,12(sp)
@@ -131,6 +138,7 @@ trap_entry:
 	lw	a3,52(sp)
 	lw	a4,56(sp)
 	lw	a5,60(sp)
+#ifdef __RV32I_MARCH__
 	lw	a6,64(sp)
 	lw	a7,68(sp)
 	lw	s2,72(sp)
@@ -147,6 +155,7 @@ trap_entry:
 	lw	t4,116(sp)
 	lw	t5,120(sp)
 	lw	t6,124(sp)
+#endif
 	addi	sp,sp,136
 
 

tb/sw/src/slvSvr.S

@@ -0,0 +1,65 @@
+#include "tl2cdr.h"
+
+.globl _prog_start
+.globl _rv32i_plic_handle
+
+.section .text.init, "ax", %progbits
+
+#if 0
+#其他代码全部使用RV32E编译，仅此代码采用 RV32I 编译，故而可以使用x0, x16~x31寄存器
+#为了方便，不再使用ABI中的别名，直接使用x0, x16~x31；x1~x15使用ABI中定义的别名
+#endif
+
+_prog_start:
+	li		x16, 0
+	
+	mv 		x17, a0 # plic_claim
+	mv 		x18, a1 # flag_intTxEnd
+	mv 		x19, a2 # flag_intRxError
+	mv 		x20, a3 # flag_intRxStart
+	mv 		x21, a4 # flag_intRxEnd
+	mv 		x22, x0
+
+	#lui 	x23, %hi(_rv32i_plic_handle)
+	#lw		x24, %lo(_rv32i_plic_handle)(x23)
+	
+	la		x24, _rv32i_plic_handle
+	
+	li		x25, 1
+	li		x26, 0
+	li		x27, 0
+	li		x28, CDR_INT_TXEND
+	li		x29, CDR_INT_RXERROR
+	li		x30, CDR_INT_RXSTART
+	li		x31, CDR_INT_RXEND
+
+    mv		a0, x24
+
+	li		x23, 0
+	li		x24, 0
+    ret
+
+	.balign 32
+_rv32i_plic_handle:
+	lw 		x23, 0(x17)    			# x23 = *plic_claim
+	sw  	x23, 0(x17)				# *plic_claim = x23
+
+	bne 	x23, x28, 1f   			#_if (x23 != x24) goto 1f
+	sw		x25, 0(x18)				#_else
+	j 		4f
+
+1:
+	bne 	x23, x29, 2f   			#_if (x23 != x24) goto 2f
+	sw		x25, 0(x19)				#_else
+	j 		4f
+
+2:
+	bne 	x23, x30, 3f			#_if (x23 != x24) goto 3f
+	sw		x25, 0(x20)				#_else
+	j 		4f
+
+3:
+	bne 	x23, x31, 4f			#_if (x23 != x24) goto 4f
+	sw		x25, 0(x21)				#_else
+4:
+	mret