From 69dcac95fffa02859f29d513dfcf7c7bc87ead75 Mon Sep 17 00:00:00 2001
From: RuigeLee <wut.ruigeli@gmail.com>
Date: Tue, 22 Oct 2024 17:30:03 +0800
Subject: [PATCH] =?UTF-8?q?=E4=BD=BF=E7=94=A8=E6=96=AD=E8=A8=80=E4=BF=9D?=
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---
 src/main/scala/backBoard/shin/ShinSlv.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/main/scala/backBoard/shin/ShinSlv.scala b/src/main/scala/backBoard/shin/ShinSlv.scala
index 9427f8e..3edecbe 100644
--- a/src/main/scala/backBoard/shin/ShinSlv.scala
+++ b/src/main/scala/backBoard/shin/ShinSlv.scala
@@ -139,7 +139,7 @@ trait ShinSlvPhyDownStreamRecv{ this: ShinSlvPhyBase =>
   downPendBuf.io.deq.ready := 
     (downRecvStateCurr === DownRecvStateOHead) |
     (downRecvStateCurr === DownRecvStateSData) |
-    ((downRecvStateCurr === DownRecvStateFData) & downForwardFifo.io.enq.ready) |
+    (downRecvStateCurr === DownRecvStateFData) |
     (downRecvStateCurr === DownRecvStateCRC  )
 
   when( downRecvStateCurr === DownRecvStateIdle & downRecvStateNext === DownRecvStateOHead){