diff --git a/rocket-chip b/rocket-chip index 17c0155..356304d 160000 --- a/rocket-chip +++ b/rocket-chip @@ -1 +1 @@ -Subproject commit 17c01556ff4de95be42cad074bcd6637a617aa80 +Subproject commit 356304dbd22075f0f50a47201950803747fe7948 diff --git a/tb/sw/src/check_custom_ins.py b/tb/sw/src/check_custom_ins.py index b44265a..a2dc6e1 100644 --- a/tb/sw/src/check_custom_ins.py +++ b/tb/sw/src/check_custom_ins.py @@ -7,8 +7,8 @@ import re -def search_custom_inst(logfile, opcode, funct, xd = 0, xs1 = 0, xs2 = 0, xd_filter = 0, xs1_filter = 0, xs2_filter = 0): - lines = logfile.readlines() +def search_custom_inst(logdata, opcode, funct, xd = 0, xs1 = 0, xs2 = 0, xd_filter = 0, xs1_filter = 0, xs2_filter = 0): + lines = logdata funct3 = 0 if xd != 0: funct3 = funct3 | 0x4 @@ -33,24 +33,46 @@ def search_custom_inst(logfile, opcode, funct, xd = 0, xs1 = 0, xs2 = 0, xd_filt ins_funct3 = (inst >> 12) & 0x7 if (ins_funct == funct) and (funct3 == ins_funct3): outline = line.rstrip() - if (xs1 != 0) and ((rreg1_val & xs1_filter) != 0): + if (xs1 != 0) and ((rreg1_val & xs1_filter) == xs1_filter): print(outline) - if (xd != 0) and ((wreg_val & xd_filter) != 0): + if (xd != 0) and ((wreg_val & xd_filter) == xd_filter): print(outline) - if (xs2 != 0) and ((rreg2_val & xs2_filter) != 0): + if (xs2 != 0) and ((rreg2_val & xs2_filter) == xs2_filter): print(outline) else: pass + +def get_bit_pos(val): + bits_pos = list() + val = val & 0xffffffff + + for i in range(32): + if (val & (1 << i)) != 0: + bits_pos.insert(0, i) + return bits_pos + if __name__ == '__main__': path = sys.argv[0] path = path.split('/')[0:-1] path = '/'.join(path) logfile_path = path + '/../build/cpu1_log.txt' + if len(sys.argv) > 1: logfile_path = sys.argv[1] print(logfile_path) with open(logfile_path, 'rt') as logfile: - search_custom_inst(logfile, 0xb, 0x17, xs1=1, xs1_filter=(1<<7)) + logdata = logfile.readlines() + + filter = 1<<7 + print(f'custom0-ins: clear roccs int flag, bit filter:', get_bit_pos(filter)) + search_custom_inst(logdata, 0xb, 0x17, xs1=1, xs1_filter=filter) + + ''' + filter = (1<<10) | (1 << 7) | (1 << 2) | (1 << 1) + print('custom0-ins: clear roccs int flag, bit filter:', get_bit_pos(filter)) + search_custom_inst(logdata, 0xb, 0x17, xs1=1, xs1_filter=filter) + ''' + logfile.close() diff --git a/tb/sw/src/halfLvdsMacSvr.c b/tb/sw/src/halfLvdsMacSvr.c index 7837933..00db5a0 100644 --- a/tb/sw/src/halfLvdsMacSvr.c +++ b/tb/sw/src/halfLvdsMacSvr.c @@ -69,7 +69,7 @@ uint32_t HLM_poll(uint32_t mode) { is_tx_crc = 1; is_rx_crc = 1; - tx_pkt_len = 256 + 4; + tx_pkt_len = 320 + 4; tx_data_ptr[0] = ((tx_pkt_len - 4) << 20) | 2;