加入常数定义

2024-07-16 15:36:40 +08:00
parent 71a489a1d0
commit 693621f1a0
8 changed files with 360 additions and 12 deletions
--- a/src/main/verilog/defineParam.v
+++ b/src/main/verilog/defineParam.v
@@ -1,3 +1,5 @@
+`define PL        16'h0002
+`define NPL       16'h0004
 `define VENDORID  16'h1122
 `define MODULEID  16'h3344
 `define HWVERSION 16'h5566