From 65491c74f6b0e9fd90d1775cea86d1ea80de9dce Mon Sep 17 00:00:00 2001 From: RuigeLee Date: Fri, 1 Nov 2024 17:07:35 +0800 Subject: [PATCH] =?UTF-8?q?=E8=BD=AF=E4=BB=B6=E6=94=B9=E5=AE=8C=EF=BC=8C?= =?UTF-8?q?=E5=BC=80=E5=A7=8B=E6=B5=8B=E8=AF=95?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/main/resources/picorv32.v | 4 +- .../scala/backBoard/pico/BackSystem.scala | 18 +-- tb/backSys_tb.v | 40 ++--- tb/sw/src/SlvMain.c | 139 ++++++++++-------- tb/sw/src/mstMain.S | 33 ++--- 5 files changed, 120 insertions(+), 114 deletions(-) diff --git a/src/main/resources/picorv32.v b/src/main/resources/picorv32.v index 31a7b55..d7ca9d9 100644 --- a/src/main/resources/picorv32.v +++ b/src/main/resources/picorv32.v @@ -81,8 +81,8 @@ module picorv32 #( parameter [ 0:0] REGS_INIT_ZERO = 0, parameter [31:0] MASKED_IRQ = 32'h 0000_0000, parameter [31:0] LATCHED_IRQ = 32'h ffff_ffff, - parameter [31:0] PROGADDR_RESET = 32'h 0000_0000, - parameter [31:0] PROGADDR_IRQ = 32'h 0000_0800, + parameter [31:0] PROGADDR_RESET = 32'h 8000_0000, + parameter [31:0] PROGADDR_IRQ = 32'h 8000_0800, parameter [31:0] STACKADDR = 32'h ffff_ffff ) ( input clk, resetn, diff --git a/src/main/scala/backBoard/pico/BackSystem.scala b/src/main/scala/backBoard/pico/BackSystem.scala index f7e2af0..710221e 100644 --- a/src/main/scala/backBoard/pico/BackSystem.scala +++ b/src/main/scala/backBoard/pico/BackSystem.scala @@ -154,24 +154,24 @@ class BackSysImp(outer: BackSys) extends LazyModuleImp(outer) with HasBackParame - sram.io.mem.valid := pico.io.mem.valid & pico.io.mem.addr(13,12) === "b00".U - cdr.io.mem.valid := pico.io.mem.valid & pico.io.mem.addr(13,12) === "b01".U & ~pico.io.mem.instr - gpio.io.mem.valid := pico.io.mem.valid & pico.io.mem.addr(13,12) === "b10".U & ~pico.io.mem.instr + sram.io.mem.valid := pico.io.mem.valid & pico.io.mem.addr.extract(31) === "b1".U + cdr.io.mem.valid := pico.io.mem.valid & pico.io.mem.addr.extract(11) === "b0".U & ~pico.io.mem.instr + gpio.io.mem.valid := pico.io.mem.valid & pico.io.mem.addr.extract(11) === "b1".U & ~pico.io.mem.instr pico.io.mem.ready := Mux( pico.io.mem.instr, sram.io.mem.ready, Mux1H(Seq( - (pico.io.mem.addr(13,12) === "b00".U ) -> sram.io.mem.ready, - (pico.io.mem.addr(13,12) === "b01".U ) -> cdr.io.mem.ready, - (pico.io.mem.addr(13,12) === "b10".U ) -> gpio.io.mem.ready, + ( pico.io.mem.addr.extract(31) === "b1".U ) -> sram.io.mem.ready, + ( pico.io.mem.addr.extract(11) === "b0".U ) -> cdr.io.mem.ready, + ( pico.io.mem.addr.extract(11) === "b1".U ) -> gpio.io.mem.ready, )) ) pico.io.mem.rdata := Mux( pico.io.mem.instr, sram.io.mem.rdata, Mux1H(Seq( - (pico.io.mem.addr(13,12) === "b00".U ) -> sram.io.mem.rdata, - (pico.io.mem.addr(13,12) === "b01".U ) -> cdr.io.mem.rdata, - (pico.io.mem.addr(13,12) === "b10".U ) -> gpio.io.mem.rdata, + ( pico.io.mem.addr.extract(31) === "b1".U ) -> sram.io.mem.rdata, + ( pico.io.mem.addr.extract(11) === "b0".U ) -> cdr.io.mem.rdata, + ( pico.io.mem.addr.extract(11) === "b1".U ) -> gpio.io.mem.rdata, )) ) diff --git a/tb/backSys_tb.v b/tb/backSys_tb.v index 188f165..3d47218 100644 --- a/tb/backSys_tb.v +++ b/tb/backSys_tb.v @@ -119,10 +119,10 @@ initial begin end - `define SRAM0 s_Mst.sram.mem_0 - `define SRAM1 s_Mst.sram.mem_1 - `define SRAM2 s_Mst.sram.mem_2 - `define SRAM3 s_Mst.sram.mem_3 + `define SRAM0 s_Mst.sram.mem_0.mem_0_ext.ram + `define SRAM1 s_Mst.sram.mem_1.mem_0_ext.ram + `define SRAM2 s_Mst.sram.mem_2.mem_0_ext.ram + `define SRAM3 s_Mst.sram.mem_3.mem_0_ext.ram localparam DP = 2**14; @@ -142,22 +142,22 @@ end end - `define SLV0_SRAM0 s_Slv0.sram.mem_0 - `define SLV0_SRAM1 s_Slv0.sram.mem_1 - `define SLV0_SRAM2 s_Slv0.sram.mem_2 - `define SLV0_SRAM3 s_Slv0.sram.mem_3 - `define SLV1_SRAM0 s_Slv1.sram.mem_0 - `define SLV1_SRAM1 s_Slv1.sram.mem_1 - `define SLV1_SRAM2 s_Slv1.sram.mem_2 - `define SLV1_SRAM3 s_Slv1.sram.mem_3 - `define SLV2_SRAM0 s_Slv2.sram.mem_0 - `define SLV2_SRAM1 s_Slv2.sram.mem_1 - `define SLV2_SRAM2 s_Slv2.sram.mem_2 - `define SLV2_SRAM3 s_Slv2.sram.mem_3 - `define SLV3_SRAM0 s_Slv3.sram.mem_0 - `define SLV3_SRAM1 s_Slv3.sram.mem_1 - `define SLV3_SRAM2 s_Slv3.sram.mem_2 - `define SLV3_SRAM3 s_Slv3.sram.mem_3 + `define SLV0_SRAM0 s_Slv0.sram.mem_0.mem_0_ext.ram + `define SLV0_SRAM1 s_Slv0.sram.mem_1.mem_0_ext.ram + `define SLV0_SRAM2 s_Slv0.sram.mem_2.mem_0_ext.ram + `define SLV0_SRAM3 s_Slv0.sram.mem_3.mem_0_ext.ram + `define SLV1_SRAM0 s_Slv1.sram.mem_0.mem_0_ext.ram + `define SLV1_SRAM1 s_Slv1.sram.mem_1.mem_0_ext.ram + `define SLV1_SRAM2 s_Slv1.sram.mem_2.mem_0_ext.ram + `define SLV1_SRAM3 s_Slv1.sram.mem_3.mem_0_ext.ram + `define SLV2_SRAM0 s_Slv2.sram.mem_0.mem_0_ext.ram + `define SLV2_SRAM1 s_Slv2.sram.mem_1.mem_0_ext.ram + `define SLV2_SRAM2 s_Slv2.sram.mem_2.mem_0_ext.ram + `define SLV2_SRAM3 s_Slv2.sram.mem_3.mem_0_ext.ram + `define SLV3_SRAM0 s_Slv3.sram.mem_0.mem_0_ext.ram + `define SLV3_SRAM1 s_Slv3.sram.mem_1.mem_0_ext.ram + `define SLV3_SRAM2 s_Slv3.sram.mem_2.mem_0_ext.ram + `define SLV3_SRAM3 s_Slv3.sram.mem_3.mem_0_ext.ram localparam DPS = 2**14; diff --git a/tb/sw/src/SlvMain.c b/tb/sw/src/SlvMain.c index d5a4556..188bd56 100644 --- a/tb/sw/src/SlvMain.c +++ b/tb/sw/src/SlvMain.c @@ -4,22 +4,26 @@ // #include "gpio.h" // #include "timer.h" -volatile uint32_t *cdr_tx_status = (uint32_t*)( 0x40000000 + 0x0 ); //read -volatile uint32_t *cdr_tx_txLen = (uint32_t*)( 0x40000000 + 0x4 ); //write -volatile uint32_t *cdr_tx_txFifo = (uint32_t*)( 0x40000000 + 0x8 ); //write -volatile uint32_t *cdr_TransDir = (uint32_t*)( 0x40000000 + 0xc ); //write +volatile uint32_t *cdr_status = (uint32_t*)( 0x000 + 0x0 ); //read +volatile uint32_t *cdr_txLen = (uint32_t*)( 0x000 + 0x4 ); //write +volatile uint32_t *cdr_txFifo = (uint32_t*)( 0x000 + 0x8 ); //write +volatile uint32_t *cdr_direct = (uint32_t*)( 0x000 + 0xc ); //write -volatile uint32_t *cdr_rx_softReset = (uint32_t*)( 0x40000000 + 0x10 ); //write -volatile uint32_t *cdr_rx_status = (uint32_t*)( 0x40000000 + 0x14 ); //read -volatile uint32_t *cdr_rx_rxLen = (uint32_t*)( 0x40000000 + 0x18 ); //read -volatile uint32_t *cdr_rx_rxFifo = (uint32_t*)( 0x40000000 + 0x1c ); //read +volatile uint32_t *cdr_softReset = (uint32_t*)( 0x000 + 0x10 ); //write +volatile uint32_t *cdr_rxLen = (uint32_t*)( 0x000 + 0x18 ); //read +volatile uint32_t *cdr_rxFifo = (uint32_t*)( 0x000 + 0x1c ); //read -volatile uint32_t *WriteGpio = (uint32_t*) ( 0x60000000); -volatile uint32_t *ReadGpio = (uint32_t*) ( 0x60000000); -volatile uint32_t *ReadIsLast = (uint32_t*) ( 0x60000008); +volatile uint32_t *WriteGpio = (uint32_t*) ( 0x800); +volatile uint32_t *ReadGpio = (uint32_t*) ( 0x800); +volatile uint32_t *ReadIsLast = (uint32_t*) ( 0x808); + + + + + static inline void error() { while(1); } @@ -41,7 +45,10 @@ void main() while(1){ + *cdr_softReset = 1; //复位脉冲 isLast = *ReadIsLast; + *cdr_direct = 0; + asm volatile ( "1:\n" @@ -50,11 +57,11 @@ void main() "andi sp, sp, 0xFB\n" ); - readDat = *cdr_0_rx_rxFifo; + readDat = *cdr_rxFifo; operator = (readDat >> 16) & 0xf; downRecvLen = readDat >> 20; - readDat = *cdr_0_rx_rxFifo; + readDat = *cdr_rxFifo; if( operator == 0 ){ slvNum = 64 - ( downRecvLen >> 3 ); @@ -69,45 +76,36 @@ void main() "1:\n" "bnez ra, 1b\n" //error ); - readDat = *cdr_0_rx_rxFifo; + readDat = *cdr_rxFifo; } if(!isLast){ // 下行转发新建包头 - *cdr_0_tx_txLen = downRecvLen; //downSendLen + 8 - *cdr_0_tx_txFifo = (downSendLen << 20) |( 0 << 16) | 0; - *cdr_0_tx_txFifo = 0; + *cdr_txLen = downRecvLen; //downSendLen + 8 + *cdr_txFifo = (downSendLen << 20) |( 0 << 16) | 0; + *cdr_txFifo = 0; - //下行转发负载 - asm volatile ( - "lui t0, %hi(0x40000000)\n" - ); + //下行转发负载 for( uint32_t i = 0; i < (downSendLen >> 2); i++ ){ //一次传4byte asm volatile ( - // "andi ra, sp, 0x08\n" - // "1:\n" - // "bnez ra, 1b\n" //error 速度不够，不再检查接收 - // "lui t0, %hi(0x40000000)\n" - "lw t1, 0x1c(t0)\n" - "sw t1, 0x08(t0)\n" - - // : : : "a0", "a1" + "andi ra, sp, 0x08\n" + "1:\n" + "bnez ra, 1b\n" //error 速度不够，不再检查接收 + "lw t1, 0x01c(x0)\n" + "sw t1, 0x008(x0)\n" ); //*cdr_0_tx_txFifo = *cdr_0_rx_rxFifo; //接收即发送 } } else{ //isLast //空转掉剩余负载 - asm volatile ( - "lui t0, %hi(0x40000000)\n" - ); for( uint32_t i = 0; i < (downSendLen >> 2); i++ ){ //一次传4byte asm volatile ( - // "andi ra, sp, 0x08\n" - // "1:\n" - // "bnez ra, 1b\n" //error 速度不够，不再检查接收 + "andi ra, sp, 0x08\n" + "1:\n" + "bnez ra, 1b\n" //error 速度不够，不再检查接收 // "lui t0, %hi(0x40000000)\n" - "lw t1, 0x1c(t0)\n" + "lw t1, 0x01c(x0)\n" ); } } @@ -117,7 +115,7 @@ void main() "1:\n" "bnez ra, 1b\n" //error ); - uint32_t crc = *cdr_0_rx_rxFifo; //CRC + uint32_t crc = *cdr_rxFifo; //CRC //等待接收完成标志 asm volatile ( @@ -128,50 +126,63 @@ void main() ); + + + + + + + + + + + + + + + *cdr_direct = 1; //方向转换 + if(!isLast){ //上行转发 //接收第一个包 asm volatile ( "1:\n" - "andi ra, sp, 0x40\n" + "andi ra, sp, 0x04\n" "beqz ra, 1b\n" - "andi sp, sp, 0xBF\n" + "andi sp, sp, 0xFB\n" ); - readDat = *cdr_1_rx_rxFifo; + readDat = *cdr_rxFifo; operator = (readDat >> 16) & 0xf; upRecvLen = readDat >> 20; totNum = slvNum + (upRecvLen >> 3) - 1; //接收第二个包 asm volatile ( - "andi ra, sp, 0x80\n" - "1:\n" - "bnez ra, 1b\n" //error + "andi ra, sp, 0x08\n" + "1:\n" + "bnez ra, 1b\n" //error ); - readDat = *cdr_1_rx_rxFifo; + readDat = *cdr_rxFifo; //发送上行包头 - *cdr_1_tx_txLen = upRecvLen + 16; //upSendLen + 8 - *cdr_1_tx_txFifo = ((upRecvLen + 8) << 20) |( 0 << 16) | 0; - *cdr_1_tx_txFifo = 0; + *cdr_txLen = upRecvLen + 16; //upSendLen + 8 + *cdr_txFifo = ((upRecvLen + 8) << 20) |( 0 << 16) | 0; + *cdr_txFifo = 0; for( uint8_t i = 0; i < 8/4; i ++ ){ - *cdr_1_tx_txFifo = 0; + *cdr_txFifo = 0; } //上行转发负载 - asm volatile ( - "lui t0, %hi(0x40000000)\n" - ); for( uint16_t i = 0; i < upRecvLen >> 2; i ++ ){ //一次传4byte asm volatile ( - // "andi ra, sp, 0x80\n" - // "1:\n" - // "bnez ra, 1b\n" //error 速度不够，不再检查接收 - "lw t1, 0x9c(t0)\n" - "sw t1, 0x88(t0)\n" + "andi ra, sp, 0x80\n" + "1:\n" + "bnez ra, 1b\n" //error 速度不够，不再检查接收 + "lw t1, 0x01c(x0)\n" + "sw t1, 0x008(x0)\n" ); // *cdr_1_tx_txFifo = *cdr_1_rx_rxFifo; //接收即发送 @@ -179,29 +190,29 @@ void main() //CRC asm volatile ( - "andi ra, sp, 0x80\n" + "andi ra, sp, 0x08\n" "1:\n" "bnez ra, 1b\n" //error ); - crc = *cdr_1_rx_rxFifo; //CRC + crc = *cdr_rxFifo; //CRC //等待接收完成标志 asm volatile ( "1:\n" - "andi ra, sp, 0x80\n" + "andi ra, sp, 0x08\n" "beqz ra, 1b\n" - "andi sp, sp, 0x7F\n" + "andi sp, sp, 0xF7\n" ); } else { //islast //发送上行包头 - *cdr_1_tx_txLen = 16; //upSendLen + 8 - *cdr_1_tx_txFifo = (8 << 20) |( 0 << 16) | 0; - *cdr_1_tx_txFifo = 0; + *cdr_txLen = 16; //upSendLen + 8 + *cdr_txFifo = (8 << 20) |( 0 << 16) | 0; + *cdr_txFifo = 0; for( uint8_t i = 0; i < 8/4; i ++ ){ - *cdr_1_tx_txFifo = 0; + *cdr_txFifo = 0; } } diff --git a/tb/sw/src/mstMain.S b/tb/sw/src/mstMain.S index 0d9ddc7..bcbeae2 100644 --- a/tb/sw/src/mstMain.S +++ b/tb/sw/src/mstMain.S @@ -1,37 +1,32 @@ -#define cdr_0_tx_status 0x40000000 -#define cdr_0_tx_txLen 0x40000004 -#define cdr_0_tx_txFifo 0x40000008 -#define cdr_0_rx_softReset 0x40000010 -#define cdr_0_rx_status 0x40000014 -#define cdr_0_rx_rxLen 0x40000018 -#define cdr_0_rx_rxFifo 0x4000001c -#define cdr_1_tx_status 0x40000080 -#define cdr_1_tx_txLen 0x40000084 -#define cdr_1_tx_txFifo 0x40000088 -#define cdr_1_rx_softReset 0x40000090 -#define cdr_1_rx_status 0x40000094 -#define cdr_1_rx_rxLen 0x40000098 -#define cdr_1_rx_rxFifo 0x4000009c +#define cdr_status 0x000 +#define cdr_txLen 0x004 +#define cdr_txFifo 0x008 +#define cdr_direct 0x00c + +#define cdr_softReset 0x010 +#define cdr_rxLen 0x018 +#define cdr_rxFifo 0x01c + + .global main main: - lui x5, %hi(cdr_0_tx_status) li x6, 520 - sw x6, 4(x5) #cdr_0_tx_txLen + sw x6, 0x004(x0) #cdr_0_tx_txLen lui x6, 0x20000 - sw x6, 8(x5) # 发送len op param0 - sw x0, 8(x5) # 发送 param1 param2 + sw x6, 0x008(x0) # 发送len op param0 + sw x0, 0x008(x0) # 发送 param1 param2 li x6, 128 # 设置循环次数 li x10, 0x1234 1: # 向cdr_0_tx_txFifo地址写入0x55，循环32次 - sw x10, 8(x5) # 向cdr_0_tx_txFifo写入0 + sw x10, 0x008(x0) # 向cdr_0_tx_txFifo写入0 addi x6, x6, -1 # 递减计数器 bnez x6, 1b # 如果计数器不为0，则继续循环