From 638308eba6b9c7d7b7dd5492b7968b31ee75dc6d Mon Sep 17 00:00:00 2001 From: Ruige Lee Date: Thu, 31 Jul 2025 10:55:05 +0800 Subject: [PATCH] =?UTF-8?q?=E4=BF=AE=E5=A4=8Dsmunit=E8=AE=A1=E6=95=B0?= =?UTF-8?q?=E5=99=A8=E4=BD=8D=E5=AE=BD?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/main/scala/backBoard/shin/SMUnit.scala | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/main/scala/backBoard/shin/SMUnit.scala b/src/main/scala/backBoard/shin/SMUnit.scala index dbdfd8a..d761ee0 100644 --- a/src/main/scala/backBoard/shin/SMUnit.scala +++ b/src/main/scala/backBoard/shin/SMUnit.scala @@ -85,10 +85,11 @@ abstract class SMUnitBase(depth: Int = 4) extends Module { ( (rPtr(log2Ceil(depth)-1, 0)) === i.U ) -> io.sram(i).rd.datar }) - val cnt = RegInit(0.U((log2Ceil(depth)).W)); io.cnt := cnt + val cnt = RegInit(0.U((log2Ceil(depth+1)).W)); io.cnt := cnt when( io.enq & ~isFull ){ cnt := cnt + 1.U + assert(cnt =/= depth.U) } .elsewhen( io.deq & ~isEmpty ){ cnt := cnt - 1.U assert(cnt =/= 0.U)