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bug:rx 大小端总线传输非对齐模式下mask错误

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RuigeLee
2023-09-27 16:14:04 +08:00
parent e6f34762e8
commit 61f15c9ebe
1 changed files with 4 additions and 4 deletions
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8
src/main/scala/mac/MacTilelink.scala
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@@ -854,10 +854,10 @@ abstract class MacTileLinkBase(edgeIn: TLEdgeIn, edgeOut: TLEdgeOut) extends Mod
}
RxByteSel := Mux1H(Seq(
(RxPointerLSB_rst === 0.U) -> "hf".U,
(RxPointerLSB_rst === 1.U) -> "h7".U,
(RxPointerLSB_rst === 2.U) -> "h3".U,
(RxPointerLSB_rst === 3.U) -> "h1".U,
(RxPointerLSB_rst === 0.U) -> "b1111".U,
(RxPointerLSB_rst === 1.U) -> "b1110".U,
(RxPointerLSB_rst === 2.U) -> "b1100".U,
(RxPointerLSB_rst === 3.U) -> "b1000".U,
))