diff --git a/src/main/scala/backBoard/shin/ShinTop.scala b/src/main/scala/backBoard/shin/ShinTop.scala index 705aad5..1c4228b 100644 --- a/src/main/scala/backBoard/shin/ShinTop.scala +++ b/src/main/scala/backBoard/shin/ShinTop.scala @@ -56,22 +56,12 @@ abstract class ShinTopBase extends Module{ io.isSoftReset := interface.io.isSoftReset io.interrupt := interface.io.interrupt - downCDRIn.io.serDat := io.dDatIn - downCDRIn.io.overCLK := io.clk8x - upCDRIn.io.serDat := io.uDatIn + downCDRIn.io.overCLK := io.clk8x upCDRIn.io.overCLK := io.clk8x - io.dDatOut := downCDROut.io.serDat - io.uDatOut := upCDROut.io.serDat - //override - when( slaveParser.io.isLoop & interface.io.cReg.modeSel === false.B){ - upCDRIn.io.serDat := downCDROut.io.serDat - io.dDatOut := false.B - } - io.ospi <> interface.io.ospi io.iqspi <> interface.io.iqspi io.oqspi <> interface.io.oqspi @@ -439,4 +429,40 @@ trait ShinTopWatchDog{ this: ShinTopBase => class ShinTop extends ShinTopBase with ShinTopMaster with ShinTopSlave -with ShinTopWatchDog +with ShinTopWatchDog{ + + when( interface.io.cReg.modeSel === false.B ){ //slave + when( (slaveParser.io.intHWTrig(0) | slaveParser.io.intHWTrig(1)) ){ //硬件错误 + downCDRIn.io.serDat := false.B + upCDRIn.io.serDat := false.B + when( slaveParser.io.isLoop ){ //回环 + io.dDatOut := false.B + io.uDatOut := io.dDatIn + } .otherwise{ //非回环 + io.dDatOut := io.dDatIn + io.uDatOut := io.uDatIn + } + } .otherwise{ //无硬件错误 + when( slaveParser.io.isLoop ){ //回环 + downCDRIn.io.serDat := io.dDatIn + upCDRIn.io.serDat := downCDROut.io.serDat + io.dDatOut := false.B + io.uDatOut := upCDROut.io.serDat + } .otherwise{ //非回环 + downCDRIn.io.serDat := io.dDatIn + upCDRIn.io.serDat := io.uDatIn + io.dDatOut := downCDROut.io.serDat + io.uDatOut := upCDROut.io.serDat + } + } + } .otherwise{ //master + downCDRIn.io.serDat := false.B + upCDRIn.io.serDat := io.uDatIn + io.dDatOut := downCDROut.io.serDat + io.uDatOut := false.B + } + + + + +}