diff --git a/Makefile b/Makefile
index 9d534a5..6439bdd 100644
--- a/Makefile
+++ b/Makefile
@@ -46,6 +46,7 @@ testShin:
 	-o ./tb/build/shinTest.iverilog  \
 	-y ./generated/shin \
 	-I ./generated/shin \
+	-D RANDOMIZE_REG_INIT \
 	./tb/shinTest/ShinTopSpiTb.v 
 	vvp  -N ./tb/build/shinTest.iverilog -lxt2
 
diff --git a/src/main/scala/backBoard/shin/SlaveParser.scala b/src/main/scala/backBoard/shin/SlaveParser.scala
index ef99210..9113e9d 100644
--- a/src/main/scala/backBoard/shin/SlaveParser.scala
+++ b/src/main/scala/backBoard/shin/SlaveParser.scala
@@ -563,7 +563,7 @@ trait SlaveParserRW{ this: SlaveParserBase =>
   io.lvds.addrw := addrw(10,0)
 
 
-  assert( ~(isRead & isWrite) )
+  // assert( ~(isRead & isWrite) )
   
 
 
diff --git a/tb/shinTest/ShinTopSpiTb.v b/tb/shinTest/ShinTopSpiTb.v
index 8abea0c..39f0dae 100644
--- a/tb/shinTest/ShinTopSpiTb.v
+++ b/tb/shinTest/ShinTopSpiTb.v
@@ -7,13 +7,13 @@
 //`define ENABLE_SMx_SEND_TEST
 
 //`define ENABLE_EXCHG_DATA_SEQ0_TEST
-`define ENABLE_EXCHG_DATA_SEQ1_TEST
+//`define ENABLE_EXCHG_DATA_SEQ1_TEST
 //`define ENABLE_EXCHG_DATA_SEQ2_TEST
-//`define ENABLE_EXCHG_DATA_SEQ3_TEST
+`define ENABLE_EXCHG_DATA_SEQ3_TEST
 
 //`define ENABLE_BC_R_TEST
-`define ENABLE_BC_W_TEST
-//`define ENABLE_BC_RW_TEST
+//`define ENABLE_BC_W_TEST
+`define ENABLE_BC_RW_TEST
 
 `define ENABLE_SYNC_TEST
 `define ENABLE_SYNC_SIG0_TEST
@@ -239,7 +239,8 @@ initial begin
 	reset <= 0;
 
 //#20000000
-#1000000000
+  #1000000000
+// #6000000
 
 	$display("Time Out !!!");
   	$fclose(spidata_file);