同步脉冲模式测试通过

This commit is contained in:
Ruige Lee
2025-05-16 16:05:38 +08:00
parent 3f1fdc725a
commit 58fbbdd1fc
3 changed files with 114 additions and 12 deletions

View File

@@ -47,7 +47,7 @@ class SlaveParserIO extends Bundle{
val trigAddr = Input( Vec(8, UInt(15.W)) )
val mstDeltaTimeStamp = Output(UInt(32.W))
val slvDeltaTimeStamp = Output(UInt(32.W))
val slvDeltaTime = Output(UInt(32.W))
val deltaFinal = Output(UInt(32.W))
val isLoop = Output(Bool())
@@ -472,6 +472,8 @@ trait SlaveParserRW{ this: SlaveParserBase =>
( upRecParser.io.stateCurr === STATE_PAYLOAD_DATA ) -> addrr,
))
val isRDReg = (readSMAddr(14,11) === "b0000".U)
val isRDSM1 = (readSMAddr(14,11) === "b0010".U)
val isRDSM3 = (readSMAddr(14,11) === "b0100".U)
@@ -552,7 +554,7 @@ trait SlaveParserSync{ this: SlaveParserBase =>
val upTimeStamp = Reg(UInt(64.W)) //上行本地时间戳寄存器
val mstTimeStamp = Reg(UInt(64.W)) //主站时间戳
val mstDeltaTimeStamp = Reg(UInt(32.W)); io.mstDeltaTimeStamp := mstDeltaTimeStamp //主站时间戳差值
val slvDeltaTimeStamp = Reg(UInt(32.W)); io.slvDeltaTime := slvDeltaTime //从站时间戳差值
val slvDeltaTimeStamp = Reg(UInt(32.W)); io.slvDeltaTime := slvDeltaTimeStamp //从站时间戳差值
val mstSlvDeltaTimeStamp = Reg(UInt(32.W)) //主发从接时间差(中间变量)
val deltaMstSlvDeltaTimeStamp = Reg(UInt(32.W)) //主差从差时间差(中间变量)