diff --git a/src/main/scala/backBoard/shin/Interface.scala b/src/main/scala/backBoard/shin/Interface.scala
index 4a2751b..566079b 100644
--- a/src/main/scala/backBoard/shin/Interface.scala
+++ b/src/main/scala/backBoard/shin/Interface.scala
@@ -973,18 +973,23 @@ trait InterfaceSync{ this: InterfaceBase =>
   val syncResetCnt = for( i <- 0 until 4 ) yield { RegInit(0.U(16.W)) } //空开第0位
 
 
-  when( cReg.syncPoint >= cReg.recoTimeStamp ){ //时间到达sync0时间点
+  when( cReg.syncPoint === cReg.recoTimeStamp ){ //时间到达sync0时间点
     syncSign(0) := true.B
-    syncPoint := syncPoint + cReg.syncPeroid
+    
   } .elsewhen( ~cReg.syncCfg(4+0) & syncResetCnt(0) === cReg.syncWidth(0) ){
     syncSign(0) := false.B
   } .elsewhen( cReg.syncCfg(4+0) & isEnW & addrw === "h122".U ){
     syncSign(0) := false.B
   }
 
+  when( cReg.syncPoint <= cReg.recoTimeStamp ){
+    syncPoint := syncPoint + cReg.syncPeroid
+  }
+
+
   for( i <- 1 until 4 ) {
 
-    when( cReg.syncPoint >= cReg.recoTimeStamp ){ //时间到达sync0时间点
+    when( cReg.syncPoint === cReg.recoTimeStamp ){ //时间到达sync0时间点
       syncOffsetCnt(i) := 0.U
     } .elsewhen( syncOffsetCnt(i) < cReg.syncOffset(i) ){
       syncOffsetCnt(i) := syncOffsetCnt(i) + 1.U