diff --git a/ShinRelease.sh b/ShinRelease.sh
index 1712d18..8c33eb7 100755
--- a/ShinRelease.sh
+++ b/ShinRelease.sh
@@ -1,19 +1,19 @@
-#!/bin/bash
-DEFAULT_TARGET="../ShinRelease" 
-
-TARGET_DIR="${1:-$DEFAULT_TARGET}"
-
-rm -rf ${TARGET_DIR}/generated/ ${TARGET_DIR}/shinTest/ ${TARGET_DIR}/resources/
-mkdir -p ${TARGET_DIR}
-cp -r ./tb/shinTest ${TARGET_DIR}/
-mkdir -p ${TARGET_DIR}/generated/
-cp -r ./generated/shin ${TARGET_DIR}/generated/
-cp -r ./src/main/resources ${TARGET_DIR}/
-cp ./tb/shinTest/Makefile_vcs ${TARGET_DIR}/Makefile
-cp ./tb/shinTest/shinTest_vcs.f ${TARGET_DIR}/
-cp ./tb/shinTest/shinTestClk_vcs.f ${TARGET_DIR}/
-find ./generated/shin -name *.v >> ${TARGET_DIR}/shinTest_vcs.f
-find ./generated/shin -name *.v >> ${TARGET_DIR}/shinTestClk_vcs.f
-#awk '{gsub(/.\/tb\/build\/wave.vcd/, "./generated/wave.vcd"); print }' ../RISCV-MAC-SWICH/tb/shinTest/ShinTopSpiTb.v > ./shinTest/ShinTopSpiTb.v
-awk '{gsub(/tb\/shinTest\/testcase_result/, "./shinTest/testcase_result"); print }' ./tb/shinTest/check_testcase.py > ${TARGET_DIR}/shinTest/check_testcase.py
+#!/bin/bash
+DEFAULT_TARGET="../ShinRelease" 
+
+TARGET_DIR="${1:-$DEFAULT_TARGET}"
+
+rm -rf ${TARGET_DIR}/generated/ ${TARGET_DIR}/shinTest/ ${TARGET_DIR}/resources/
+mkdir -p ${TARGET_DIR}
+cp -r ./tb/shinTest ${TARGET_DIR}/
+mkdir -p ${TARGET_DIR}/generated/
+cp -r ./generated/shin ${TARGET_DIR}/generated/
+cp -r ./src/main/resources ${TARGET_DIR}/
+cp ./tb/shinTest/Makefile_vcs ${TARGET_DIR}/Makefile
+cp ./tb/shinTest/shinTest_vcs.f ${TARGET_DIR}/
+cp ./tb/shinTest/shinTestClk_vcs.f ${TARGET_DIR}/
+find ./generated/shin -name *.v >> ${TARGET_DIR}/shinTest_vcs.f
+find ./generated/shin -name *.v >> ${TARGET_DIR}/shinTestClk_vcs.f
+#awk '{gsub(/.\/tb\/build\/wave.vcd/, "./generated/wave.vcd"); print }' ../RISCV-MAC-SWICH/tb/shinTest/ShinTopSpiTb.v > ./shinTest/ShinTopSpiTb.v
+awk '{gsub(/tb\/shinTest\/testcase_result/, "./shinTest/testcase_result"); print }' ./tb/shinTest/check_testcase.py > ${TARGET_DIR}/shinTest/check_testcase.py
 #awk '{gsub(/.\/tb\/build\/wave_clk.vcd/, "./generated/wave_clk.vcd"); print }' ../RISCV-MAC-SWICH/tb/shinTest/ShinTopSpiTb_clk.v > ./shinTest/ShinTopSpiTb_clk.v
\ No newline at end of file