Merge branch 'mp_eb_dev' into feature/dwupEx

src/main/scala/backBoard/shin/Interface.scala

@@ -810,10 +810,10 @@ trait InterfaceSync{ this: InterfaceBase =>
     }
 
     for( i <- 0 until 4 ){
-      when( io.lvds.addrw === ("h122".U(16.W) + (2*i).U)){
-        syncWidth(i) := Cat( syncWidth(i)(15,8), io.lvds.dataw ) 
-      } .elsewhen( io.lvds.addrw === ("h123".U(16.W) + (2*i).U) ){
-        syncWidth(i) := Cat( io.lvds.dataw, syncWidth(i)(7,0) ) 
+      when( addrw === ("h122".U(16.W) + (2*i).U)){
+        syncWidth(i) := Cat( syncWidth(i)(15,8), dataw ) 
+      } .elsewhen( addrw === ("h123".U(16.W) + (2*i).U) ){
+        syncWidth(i) := Cat( dataw, syncWidth(i)(7,0) ) 
       }
     }
 
@@ -992,13 +992,18 @@ trait InterfaceSync{ this: InterfaceBase =>
 
   when( cReg.syncPoint === cReg.recoTimeStamp ){ //时间到达sync0时间点
     syncSign(0) := true.B
-    syncPoint := syncPoint + cReg.syncPeroid
+    
   } .elsewhen( ~cReg.syncCfg(4+0) & syncResetCnt(0) === cReg.syncWidth(0) ){
     syncSign(0) := false.B
   } .elsewhen( cReg.syncCfg(4+0) & isEnW & addrw === "h122".U ){
     syncSign(0) := false.B
   }
 
+  when( cReg.syncPoint <= cReg.recoTimeStamp ){
+    syncPoint := syncPoint + cReg.syncPeroid
+  }
+
+
   for( i <- 1 until 4 ) {
 
     when( cReg.syncPoint === cReg.recoTimeStamp ){ //时间到达sync0时间点
@@ -1200,12 +1205,17 @@ trait InterfaceSystem{ this: InterfaceBase =>
     intStatus(19) := true.B
   }
 
+
+  val intHWErr = Seq(
+   ( ~RegNext(io.intHWTrig(0), false.B) & io.intHWTrig(0)),
+   ( ~RegNext(io.intHWTrig(1), false.B) & io.intHWTrig(1))
+  )
   //下行接收硬件错误
-  when( io.intHWTrig(0) ){
+  when( intHWErr(0) ){
     intStatus(29) := true.B
   }
   //上行接收硬件错误
-  when( io.intHWTrig(1) ){
+  when( intHWErr(1) ){
     intStatus(30) := true.B
   }
 
@@ -1241,8 +1251,8 @@ trait InterfaceSystem{ this: InterfaceBase =>
     (0 until 8).map{ i => io.intSlvTrig(i) & cReg.intEnable(8+i)}.reduce(_|_) | //从站SM请求
     (0 until 4).map{ i => io.intTransEnd(i) & cReg.intEnable(16+i)}.reduce(_|_) | //传输完成请求 16,17,18,19
     isMstRecCRCErr | //override //主站状态下19为上行crc接收错误 //不会同时发生
-    io.intHWTrig(0) | //下行接收硬件错误
-    io.intHWTrig(1)   //上行接收硬件错误
+    intHWErr(0) | //下行接收硬件错误
+    intHWErr(1)   //上行接收硬件错误
 
   when( intPulseResetCnt === intPulseWidth ){
     intPulse := false.B