增加了一个c语言查询版本的代码,便于沟通调试;如果编译C语言版本,Makefile中控制系统都采用rv32i的march编译即可。

This commit is contained in:
2025-02-10 14:38:49 +08:00
parent 94acbfae03
commit 4d853a29d7
9 changed files with 539 additions and 592 deletions

View File

@@ -1,13 +1,13 @@
TARGET=riscv64-unknown-elf
RVCC=$(TARGET)-gcc
RVCCVERSION=$(shell $(RVCC) --version | grep ^$(RVCC) | sed 's/^.* //g')
RV32I_MARCH=-march=rv32i -mabi=ilp32
RV32E_MARCH=-march=rv32e -mabi=ilp32e
RV32I_CFLAGS=-O2 -D__RV32I_MARCH__
RV32E_CFLAGS=-O2
ISR_MARCH=-march=rv32i -mabi=ilp32
APP_MARCH=-march=rv32i -mabi=ilp32
ISR_CFLAGS=-O2
APP_CFLAGS=-O2
ifeq "$(RVCCVERSION)" "12.2.0"
RV32I_MARCH=-march=rv32izicsr -mabi=ilp32
RV32E_MARCH=-march=rv32ezicsr -mabi=ilp32e
ISR_MARCH=-march=rv32izicsr -mabi=ilp32
APP_MARCH=-march=rv32izicsr -mabi=ilp32
endif
.PHONY: compile tb wave
@@ -80,13 +80,13 @@ sw:
mkdir -p ./tb/sw/build/
#这是主站的中断服务程序,以及初始化程序
$(RVCC) -ggdb $(RV32I_MARCH) $(RV32I_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
$(RVCC) -ggdb $(ISR_MARCH) $(ISR_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/src/mstSvr.S \
-o ./tb/sw/build/mstSvr.o
$(RVCC) -ggdb $(RV32I_MARCH) $(RV32I_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
$(RVCC) -ggdb $(ISR_MARCH) $(ISR_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
-T ./tb/sw/linker.lds \
./tb/sw/build/mstSvr.o \
-o ./tb/sw/build/mstSvr.elf
@@ -96,36 +96,43 @@ sw:
python3 ./tb/sw/bin_2_c_array.py ./tb/sw/build/mstSvr.bin ./tb/sw/build/mstSvr.c
#这是主站的程序
$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/build/mstSvr.c \
-o ./tb/sw/build/mstSvr.o
$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/src/mstStartup.S \
-o ./tb/sw/build/mstStartup.o
$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/src/halfLvdsMacSvr.c \
-o ./tb/sw/build/halfLvdsMacSvr.o
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/tl2cdr/tl2cdr.c \
-o ./tb/sw/build/tl2cdr.o
$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/src/MstMain.c \
-o ./tb/sw/build/mstMain.o
$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
-T ./tb/sw/linker.lds \
./tb/sw/build/mstStartup.o \
./tb/sw/build/mstMain.o \
./tb/sw/build/mstSvr.o \
./tb/sw/build/tl2cdr.o \
./tb/sw/build/halfLvdsMacSvr.o \
-o ./tb/sw/build/mstTest.elf
$(TARGET)-objcopy -O binary ./tb/sw/build/mstTest.elf ./tb/sw/build/mstTest.bin
@@ -136,13 +143,13 @@ sw:
sed -i 's/@400/@000/g' ./tb/sw/build/mstTest.verilog
#这是从站的中断服务程序,以及初始化程序
$(RVCC) -ggdb $(RV32I_MARCH) $(RV32I_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
$(RVCC) -ggdb $(ISR_MARCH) $(ISR_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/src/slvSvr.S \
-o ./tb/sw/build/slvSvr.o
$(RVCC) -ggdb $(RV32I_MARCH) $(RV32I_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
$(RVCC) -ggdb $(ISR_MARCH) $(ISR_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
-T ./tb/sw/linker.lds \
./tb/sw/build/slvSvr.o \
-o ./tb/sw/build/slvSvr.elf
@@ -152,36 +159,43 @@ sw:
python3 ./tb/sw/bin_2_c_array.py ./tb/sw/build/slvSvr.bin ./tb/sw/build/slvSvr.c
#这是从站的程序
$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/build/slvSvr.c \
-o ./tb/sw/build/slvSvr.o
$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/tl2cdr/tl2cdr.c \
-o ./tb/sw/build/tl2cdr.o
$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/src/halfLvdsMacSvr.c \
-o ./tb/sw/build/halfLvdsMacSvr.o
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/src/SlvMain.c \
-o ./tb/sw/build/slvMain.o
$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-I ./tb/sw/tl2cdr \
-c ./tb/sw/src/slvStartup.S \
-o ./tb/sw/build/slvStartup.o
$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
$(RVCC) -ggdb $(APP_MARCH) $(APP_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
-T ./tb/sw/linker.lds \
./tb/sw/build/slvSvr.o \
./tb/sw/build/slvStartup.o \
./tb/sw/build/slvMain.o \
./tb/sw/build/tl2cdr.o \
./tb/sw/build/halfLvdsMacSvr.o \
-o ./tb/sw/build/slvTest.elf
$(TARGET)-objcopy -O binary ./tb/sw/build/slvTest.elf ./tb/sw/build/slvTest.bin

View File

@@ -2,7 +2,14 @@
#include "tl2cdr.h"
#include "system_cfg.h"
#include "sysDef.h"
#include "halfLvdsMacSvr.h"
#ifdef __riscv_i
#define USING_POLL_STRATEGY
#endif
//-------------------------------------------------------------------
volatile uint32_t *const plic_priority = (uint32_t *)(0xc000000U);
volatile uint32_t *plic_pending_0_31 = (uint32_t*)( 0xc000000U + 0X001000 );
@@ -11,19 +18,38 @@ volatile uint32_t *plic_enable_0_31 = (uint32_t*)( 0xc000000U + 0X002000 );
volatile uint32_t *plic_threshold_0 = (uint32_t*)( 0xc000000U + 0X200000 );
volatile uint32_t *plic_claim = (uint32_t*)( 0xc000000U + 0X200004 );
uint8_t MST_TX_BUF[TX_BUF_NUM * TX_BUF_MAX_LEN] __attribute__((aligned(32)));
uint8_t MST_RX_BUF[RX_BUF_NUM * RX_BUF_MAX_LEN] __attribute__((aligned(32)));
static inline void error() {
//-------------------------------------------------------------------
//internal function
static uint32_t init_plic(void);
static void error() ;
void main()
{
int i;
//初始化plic
init_plic();
//延迟等待从机复位,初始化
for (i = 0; i < 100; i++)
asm volatile("nop");
#ifdef USING_POLL_STRATEGY
//使用查询策略 POLL_STRATEGY 操作 half lvds mac
HLM_poll(WORKMODE_MASTER);
#else
//使用中断策略操作half lvds mac
HLM_work_with_isr(WORKMODE_MASTER);
#endif
while (1);
}
extern const uint8_t int_svr_code[];
uint32_t (*sys_call)(uint32_t no, ...);
void main()
uint32_t init_plic(void)
{
int i;
/*初始化plic*/
*plic_enable_0_31 = 1 << CDR_INT_TX0END
@@ -60,156 +86,12 @@ void main()
*plic_threshold_0 = 0;
#if 0
//再写一次实现延迟,等从机的复位完成
*plic_enable_0_31 = 1 << CDR_INT_TXEND | 1 << CDR_INT_RXERROR | 1 << CDR_INT_RXSTART | 1 << CDR_INT_RXEND;
*plic_priority_TxEnd = 1;
*plic_priority_RxError = 1;
*plic_priority_RxStart = 1;
*plic_priority_RxEnd = 1;
*plic_threshold_0 = 0;
#else
//延迟等待从机复位,初始化
for (i = 0; i < 100; i++)
asm volatile("nop");
#endif
//while (init_svr_code() != 1);
sys_call = (void *)int_svr_code;
//复位脉冲
*tx0_softReset = 1;
*tx1_softReset = 1;
*rx0_softReset = 1;
*rx1_softReset = 1;
//tx0 下行
//tx1 上行
//rx0 下行
//rx1 上行
uint32_t tx_len;
tx_len = 32;
for (i = 0; i < tx_len - 1; i++)
{
MST_TX_BUF[i] = i;
return 0;
}
sys_call(SYS_SET_RECV_INFO, MST_RX_BUF);
sys_call(SYS_SEND_DATA, MST_TX_BUF, tx_len);
while (1);
#if 0
*cdr_txLen = 520; //总长520
*cdr_txFifo = (512 << 20) |( 0 << 16) | 0x0000; //负载长度512操作数0 参数全0
*cdr_txFifo = 0x00000000;
for( uint32_t i = 0; i < 512/4 - 1; i ++ ){
*cdr_txFifo = 0x00000000;
}
crc = *cdr_txCrc;
*cdr_txFifo = crc;
//等待发送完成标志
// asm volatile (
// "1:\n"
// "andi %0, sp, 0x01\n"
// "beqz %0, 1b\n"
// "andi sp, sp, 0xFE\n"
// :"+r"(flag)
// );
while( !flag_intTxEnd );
flag_intTxEnd = 0;
*cdr_softReset = 1; //复位脉冲
*cdr_direct = 1; //方向切换上行
//接收第一个包
// asm volatile (
// "1:\n"
// "andi %0, sp, 0x04\n"
// "beqz %0, 1b\n"
// "andi sp, sp, 0xFB\n"
// :"+r"(flag)
// );
while(!flag_intRxStart);
flag_intRxStart = 0;
readDat = *cdr_rxFifo;
// operator = (readDat >> 16) & 0xf; //速度不够,不校验
upRecvLen = readDat >> 20;
//接收第二个包
// asm volatile (
// "andi %0, sp, 0x08\n"
// "1:\n"
// "bnez %0, 1b\n" //error //速度不够,不校验
// :"+r"(flag),
// );
if( flag_intRxError ){
void error() {
while(1);
}
uint32_t temp = *cdr_rxFifo;
//上行转发负载
for( uint32_t i = 0; i < (upRecvLen >> 2); i ++ ){ //一次传4byte
if( flag_intRxError ){
while(1);
}
// register uint32_t upData;
// asm volatile (
// "andi %0, sp, 0x80\n"
// "1:\n"
// "bnez %0, 1b\n" //error 速度不够,不再检查接收
// "lw %1, 0x01c(x0)\n"
// :"+r"(flag), "+r"(upData)
// );
}
//CRC
if( flag_intRxError ){
while(1);
}
// asm volatile (
// "andi %0, sp, 0x08\n"
// "1:\n"
// "bnez %0, 1b\n" //error
// :"+r"(flag)
// );
//uint32_t crc = *cdr_rxFifo; //CRC
//等待接收完成标志
// asm volatile (
// "1:\n"
// "andi %0, sp, 0x08\n"
// "beqz %0, 1b\n"
// "andi sp, sp, 0xF7\n"
// :"+r"(flag)
// );
while(!flag_intRxEnd);
flag_intRxEnd = 0;
totNum = (upRecvLen >> 3);
#endif
}

View File

@@ -4,7 +4,12 @@
// #include "timer.h"
#include "tl2cdr.h"
#include "system_cfg.h"
#include "halfLvdsMacSvr.h"
#include "sysDef.h"
#ifdef __riscv_i
#define USING_POLL_STRATEGY
#endif
volatile uint32_t *const plic_priority = (uint32_t *)(0xc000000U);
@@ -14,21 +19,46 @@ volatile uint32_t *plic_enable_0_31 = (uint32_t*)( 0xc000000U + 0X002000 );
volatile uint32_t *plic_threshold_0 = (uint32_t*)( 0xc000000U + 0X200000 );
volatile uint32_t *plic_claim = (uint32_t*)( 0xc000000U + 0X200004 );
static inline void error() {
static void error();
static uint32_t init_plic(void);
void main()
{
init_plic();
//复位脉冲
*tx0_softReset = 1;
*tx1_softReset = 1;
*rx0_softReset = 1;
*rx1_softReset = 1;
//tx0 下行
//tx1 上行
//rx0 下行
//rx1 上行
#ifdef USING_POLL_STRATEGY
//使用查询策略 POLL_STRATEGY 操作 half lvds mac
HLM_poll(WORKMODE_SLAVE);
#else
//使用中断策略操作half lvds mac
HLM_work_with_isr(WORKMODE_SLAVE);
#endif
while (1);
}
void error() {
while(1);
}
extern const uint8_t int_svr_code[];
uint32_t (*sys_call)(uint32_t no, ...);
void main()
uint32_t init_plic(void)
{
int i;
/*初始化plic*/
*plic_enable_0_31 = 1 << CDR_INT_TX0END
@@ -62,406 +92,11 @@ void main()
plic_priority[CDR_INT_TX1_FIFO_DEQ] = 1;
plic_priority[CDR_INT_RX0_FIFO_ENQ] = 1;
plic_priority[CDR_INT_RX1_FIFO_ENQ] = 1;
*plic_threshold_0 = 0;
sys_call = (void *)int_svr_code;
//复位脉冲
*tx0_softReset = 1;
*tx1_softReset = 1;
*rx0_softReset = 1;
*rx1_softReset = 1;
//tx0 下行
//tx1 上行
//rx0 下行
//rx1 上行
while (1);
#if 0
register uint32_t readDat;
register uint32_t operator;
register uint32_t downRecvLen;
register uint32_t upRecvLen;
register uint32_t crc;
uint8_t localData[512];
uint32_t slvNum;
uint32_t totNum;
register uint32_t isLast;
register uint32_t flag;
*plic_enable_0_31 = 1 << CDR_INT_TXEND | 1 << CDR_INT_RXERROR | 1 << CDR_INT_RXSTART | 1 << CDR_INT_RXEND;
*plic_priority_TxEnd = 1;
*plic_priority_RxError = 1;
*plic_priority_RxStart = 1;
*plic_priority_RxEnd = 1;
*plic_threshold_0 = 0;
while(1){
*cdr_softReset = 1; //复位脉冲
*cdr_direct = 0;
isLast = *cdr_IsLast;
// asm volatile(
// "sw x0, 0x10(x0)\n" //cdr_softReset 写入任意值进行复位//复位脉冲
// "lw %0, 0x408(x0)\n" //ReadIsLast 获取是否为最后一个从机
// "sw x0, 0xc(x0)\n" //设置CDR方向
// : "+r"(isLast)
// );
// *WriteGpio = 0x01;
//等待接收开始中断
while(!flag_intRxStart);
// asm volatile (
// "1:\n"
// "andi %0, sp, 0x04\n"
// "beqz %0, 1b\n"
// "andi sp, sp, 0xFB\n"
// : "+r"(flag)
// );
readDat = *cdr_rxFifo;
operator = (readDat >> 16) & 0xf;
downRecvLen = readDat >> 20;
readDat = *cdr_rxFifo;
// asm volatile (
// "lw %0, 0x1c(x0)\n" //read rxfifo
// "srli %1, %0, 16\n" // operator = readDat >> 16
// "srli %2, %1, 4\n" // downRecvLen = operator >> 4
// "andi %1, %1,0xf\n" // operator = operator & 0xf
// "lw %0, 0x1c(x0)\n" //read rxfifo
// : "+r"(readDat), "+r"(operator), "+r"(downRecvLen)
// );
// *WriteGpio = 0x03;
if( operator == 0 ){
//接收本地包
for( uint32_t i = 0; i < 2; i++ ) {
if( flag_intRxError ){
while(1);
}
*(localData+i) = *cdr_rxFifo;
// asm volatile (
// "andi %0, sp, 0x08\n"
// "1:\n"
// "bnez %0, 1b\n" //error
// "lw %1, 0x1c(x0)\n" //read rxfifo
// : "+r"(flag), "+r"(readDat)
// );
return 0;
}
// *WriteGpio = 0x07;
register uint32_t downSendLen;
downSendLen = downRecvLen - 8;
if(!isLast){
// 下行转发新建包头
register uint32_t downSendHead;
*cdr_txLen = downRecvLen;
downSendHead = (downSendLen << 20) | ( 0 << 16) | 0;
*cdr_txFifo = downSendHead;
*cdr_txFifo = 0;
// asm volatile (
// "sw %0, 0x4(x0)\n" // *cdr_txLen = downRecvLen
// "addi %2, %0, -8\n" //downSendLen = downRecvLen - 8;
// "slli %1, %2, 20\n" // downSendHead = (downSendLen << 20) |( 0 << 16) | 0;
// "sw %1, 0x8(x0)\n" //*cdr_txFifo = downSendHead
// "sw x0, 0x8(x0)\n" //*cdr_txFifo = 0
// : "+r"(downRecvLen), "+r"(downSendHead), "+r"(downSendLen)
// );
//下行转发负载
for( uint32_t i = 0; i < (downSendLen); i+=4 ){ //一次传4byte
register uint32_t forData;
if( flag_intRxError){
while(1);
}
*cdr_txFifo = *cdr_rxFifo;
// asm volatile (
// "andi %0, sp, 0x08\n"
// "1:\n"
// "bnez %0, 1b\n" //error 速度不够,不再检查接收
// "lw %1, 0x01c(x0)\n"
// "sw %1, 0x008(x0)\n"
// :
// "+r"(flag), "+r"(forData)
// );
}
} else{ //isLast
//空转掉剩余负载
for( uint32_t i = 0; i < (downSendLen >> 2); i++ ){ //一次传4byte
register uint32_t forData;
if( flag_intRxError ){
while(1);
}
readDat = *cdr_rxFifo;
// asm volatile (
// "andi %0, sp, 0x08\n"
// "1:\n"
// "bnez %0, 1b\n" //error 速度不够,不再检查接收
// "lw %1, 0x01c(x0)\n"
// : "+r"(flag), "+r"(forData)
// );
}
}
// *WriteGpio = 0x0f;
//CRC
if( flag_intRxError ){
while(1);
}
crc = *cdr_rxFifo;
// asm volatile (
// "andi %0, sp, 0x08\n"
// "1:\n"
// "bnez %0, 1b\n" //error
// "lw %1, 0x1c(x0)\n" //read rxfifo
// : "+r"(flag), "+r"(readDat)
// );
// *WriteGpio = 0x1f;
//等待接收完成标志
while(!flag_intRxEnd);
flag_intRxEnd = 0;
// asm volatile (
// "1:\n"
// "andi %0, sp, 0x08\n"
// "beqz %0, 1b\n"
// "andi sp, sp, 0xF7\n"
// : "+r"(flag)
// );
// *WriteGpio = 0x3f;
if(!isLast){
//等待发送完成标志
while(!flag_intTxEnd);
flag_intTxEnd = 0;
// asm volatile (
// "1:\n"
// "andi %0, sp, 0x01\n"
// "beqz %0, 1b\n"
// "andi sp, sp, 0xFE\n"
// :"+r"(flag)
// );
}
// *WriteGpio = 0x7f;
register uint32_t one = 1;
register uint32_t txLen;
register uint32_t txHeader;
*cdr_softReset = 1;
*cdr_direct = 1;
// asm volatile(
// "sw x0, 0x10(x0)\n" //cdr_softReset 写入任意值进行复位//复位脉冲
// "sw %0, 0xc(x0)\n" //设置CDR方向
// : "+r"(one)
// );
if(!isLast){
//上行转发
//接收第一个包
while(!flag_intRxStart);
flag_intRxStart = 0;
// asm volatile (
// "1:\n"
// "andi %0, sp, 0x04\n"
// "beqz %0, 1b\n"
// "andi sp, sp, 0xFB\n"
// :"+r"(flag)
// );
//接收第一个包
if(flag_intRxError){while(1);}
readDat = *cdr_rxFifo;
upRecvLen = readDat >> 20;
txLen = upRecvLen + 16;
txHeader = upRecvLen + 8;
txHeader = (txHeader << 20) | ( 0 << 16) | 0;
//发送上行包头
*cdr_txLen = txLen;
*cdr_txFifo = txHeader;
*cdr_txFifo = 0;
// asm volatile (
// "lw %0, 0x1c(x0)\n" //read rxfifo
// "srli %1, %0, 20\n" // upRecvLen = readDat >> 20
// "addi %2, %1, 16\n" //txLen = upRecvLen + 16
// "addi %3, %1, 8\n" //txHeader = upRecvLen + 8
// "slli %3, %3, 20\n" //txHeader = txHeader << 20 |( 0 << 16) | 0
// "sw %2, 0x4(x0)\n" //*cdr_txLen = txLen
// "sw %3, 0x8(x0)\n" //*cdr_txFifo = txHeader
// "sw x0, 0x8(x0)\n" //*cdr_txFifo = 0
// : "+r"(readDat), "+r"(upRecvLen), "+r"( txLen ), "+r"( txHeader )
// );
for( uint32_t i = 0; i < 8/4; i ++ ){
*cdr_txFifo = 0;
// asm volatile (
// "sw x0, 0x8(x0)\n" //*cdr_txFifo = 0;
// );
}
//接收第二个包
if(flag_intRxError){while(1);}
readDat = *cdr_rxFifo;
// asm volatile (
// "andi %0, sp, 0x08\n"
// "1:\n"
// "bnez %0, 1b\n" //error //速度不够,不校验
// "lw %1, 0x1c(x0)\n" //read rxfifo
// :"+r"(flag), "+r"(readDat)
// );
//上行转发负载
for( uint32_t i = 0; i < (upRecvLen); i += 4 ){ //一次传4byte
register uint32_t forData;
if( flag_intRxError ){
while(1);
}
*cdr_txFifo = *cdr_rxFifo;
// asm volatile (
// "andi %0, sp, 0x80\n"
// "1:\n"
// "bnez %0, 1b\n" //error 速度不够,不再检查接收
// "lw %1, 0x01c(x0)\n"
// "sw %1, 0x008(x0)\n"
// :"+r"(flag), "+r"(forData)
// );
}
//CRC
if( flag_intRxError ){
while(1);
}
crc = *cdr_rxFifo;
// asm volatile (
// "andi %0, sp, 0x08\n"
// "1:\n"
// "bnez %0, 1b\n" //error
// "lw %0, 0x1c(x0)\n" //read rxfifo
// :"+r"(flag), "+r"(readDat)
// );
//等待接收完成标志
while(!flag_intRxEnd);
flag_intRxEnd = 0;
// asm volatile (
// "1:\n"
// "andi %0, sp, 0x08\n"
// "beqz %0, 1b\n"
// "andi sp, sp, 0xF7\n"
// :"+r"(flag)
// );
totNum = slvNum + (upRecvLen >> 3) - 1;
} else { //islast
//发送上行包头
txLen = upRecvLen + 16;
txHeader = ( 8 << 20 ) | ( 0 << 16) | 0;
*cdr_txLen = txLen;
*cdr_txFifo = txHeader;
*cdr_txFifo = 0;
// asm volatile (
// "li %0, 16\n" //txLen = upRecvLen + 16
// "sw %0, 0x4(x0)\n" //*cdr_txLen = txLen
// "lui %1, 0x800\n" //txHeader = 8 << 20 |( 0 << 16) | 0
// "sw %1, 0x8(x0)\n" //*cdr_txFifo = txHeader
// "sw x0, 0x8(x0)\n" //*cdr_txFifo = 0
// : "+r"( txLen ), "+r"( txHeader )
// );
for( uint32_t i = 0; i < 8/4; i ++ ){
*cdr_txFifo = 0;
// asm volatile (
// "sw x0, 0x8(x0)\n" //*cdr_txFifo = 0;
// );
}
}
//等待发送完成标志
while(!flag_intTxEnd);
flag_intTxEnd = 0;
// asm volatile (
// "1:\n"
// "andi %0, sp, 0x01\n"
// "beqz %0, 1b\n"
// "andi sp, sp, 0xFE\n"
// :"+r"(flag)
// );
slvNum = 64 - ( downRecvLen >> 3 );
// *WriteGpio = 1 << slvNum;
} else if ( operator == 1 ){
// error();
} else if ( operator == 2 ){
// error();
} else {
// error();
}
}
#endif
}

193
tb/sw/src/halfLvdsMacSvr.c Normal file
View File

@@ -0,0 +1,193 @@
#include "system_cfg.h"
#include "sysDef.h"
#include "tl2cdr.h"
#include "halfLvdsMacSvr.h"
//-------------------------------------------------------------------
uint8_t MST_TX_BUF[TX_BUF_NUM * TX_BUF_MAX_LEN] __attribute__((aligned(32)));
uint8_t MST_RX_BUF[RX_BUF_NUM * RX_BUF_MAX_LEN] __attribute__((aligned(32)));
//-------------------------------------------------------------------
extern const uint8_t int_svr_code[];
uint32_t (*sys_call)(uint32_t no, ...);
uint32_t HLM_work_with_isr(uint32_t mode)
{
int i;
sys_call = (void *)int_svr_code;
//复位脉冲
*tx0_softReset = 1;
*tx1_softReset = 1;
*rx0_softReset = 1;
*rx1_softReset = 1;
//tx0 下行
//tx1 上行
//rx0 下行
//rx1 上行
if (mode == WORKMODE_MASTER)
{
uint32_t tx_len;
tx_len = 32;
for (i = 0; i < tx_len - 1; i++)
{
MST_TX_BUF[i] = i;
}
sys_call(SYS_SET_RECV_INFO, MST_RX_BUF);
sys_call(SYS_SEND_DATA, MST_TX_BUF, tx_len);
}
else if (mode == WORKMODE_SLAVE)
{
}
else
{
}
return 0;
}
/*
#define CDR_INT_TX0END 14U
#define CDR_INT_TX1END 15U
#define CDR_INT_RX0ERROR 16U
#define CDR_INT_RX1ERROR 17U
#define CDR_INT_RX0START 18U
#define CDR_INT_RX1START 19U
#define CDR_INT_RX0END 20U
#define CDR_INT_RX1END 21U
#define CDR_INT_TX0_FIFO_DEQ 22U
#define CDR_INT_TX1_FIFO_DEQ 23U
#define CDR_INT_RX0_FIFO_ENQ 24U
#define CDR_INT_RX1_FIFO_ENQ 25U
*/
volatile uint32_t isr_flag[32] = {0};
uint32_t HLM_poll(uint32_t mode)
{
if (mode == WORKMODE_MASTER)
{
uint32_t pkt_len = 32;
uint32_t i;
uint32_t *data_ptr = (uint32_t *)MST_TX_BUF;
//准备数据
for (i = 0; i < pkt_len; i++)
MST_TX_BUF[i] = i;
//开始发送工作
*tx0_txLen = pkt_len + 8;
*tx0_txFifo = (pkt_len << 20) | (0 << 16) | 0;
uint32_t tx_index = 0;
uint32_t rx_index = 0;
while (1)
{
if (isr_flag[CDR_INT_TX0_FIFO_DEQ])
{
isr_flag[CDR_INT_TX0_FIFO_DEQ] = 0;
if (tx_index < pkt_len / 4)
{
*tx0_txFifo = data_ptr[tx_index];
tx_index++;
}
}
if (isr_flag[CDR_INT_RX1START])
{
isr_flag[CDR_INT_RX1START] = 0;
MST_RX_BUF[rx_index] = *rx1_rxFifo;
rx_index++;
}
if (isr_flag[CDR_INT_RX1_FIFO_ENQ])
{
isr_flag[CDR_INT_RX1_FIFO_ENQ] = 0;
MST_RX_BUF[rx_index] = *rx1_rxFifo;
rx_index++;
}
if (isr_flag[CDR_INT_RX1END])
break;
}
}
else if (mode == WORKMODE_SLAVE)
{
uint32_t rx_index = 0;
while (1)
{
if (isr_flag[CDR_INT_TX0_FIFO_DEQ])
{
isr_flag[CDR_INT_TX0_FIFO_DEQ] = 0;
}
//tx1 上行
if (isr_flag[CDR_INT_TX1_FIFO_DEQ])
{
isr_flag[CDR_INT_TX1_FIFO_DEQ] = 0;
}
//rx0 下行
if (isr_flag[CDR_INT_RX0START])
{
isr_flag[CDR_INT_RX0START] = 0;
}
if (isr_flag[CDR_INT_RX0_FIFO_ENQ])
{
isr_flag[CDR_INT_RX0_FIFO_ENQ] = 0;
if (rx_index == 0)
{
uint32_t first = *rx0_rxFifo;
uint32_t len;
len = (first >> 20U);
*tx1_txLen = len + 8U;
*tx1_txFifo = first;
rx_index += 4U;
}
else
{
*tx1_txFifo = *rx0_rxFifo;
rx_index += 4U;
}
}
if (isr_flag[CDR_INT_RX0END])
{
isr_flag[CDR_INT_RX0END] = 0;
break;
}
if (isr_flag[CDR_INT_RX1END])
{
isr_flag[CDR_INT_RX1END] = 0;
break;
}
}
}
else
{
}
}

View File

@@ -0,0 +1,12 @@
#ifndef __HALF_LVDS_MAC_SVR_H__
#define __HALF_LVDS_MAC_SVR_H__
#include "stdint.h"
uint32_t HLM_poll(uint32_t mode);
uint32_t HLM_work_with_isr(uint32_t mode);
#endif

View File

@@ -5,6 +5,10 @@
.extern int_svr_code
.extern plic_claim
#ifdef __riscv_i
.extern plic_handle
#endif
.globl _prog_start
.section .text.init
@@ -25,7 +29,7 @@ _prog_start:
li x13, 0
li x14, 0
li x15, 0
#ifdef __RV32I_MARCH__
#ifdef __riscv_i
li x16, 0
li x17, 0
li x18, 0
@@ -46,6 +50,9 @@ _prog_start:
li sp, 0x40011000
#ifdef __riscv_i
la t0, trap_entry
#else
li a0, 0
lui t0, %hi(plic_claim)
@@ -53,7 +60,7 @@ _prog_start:
call int_svr_code
mv t0, a0 #trap_entry,RV32I
#endif
csrw mtvec, t0
li t0, 1 << 11
csrw mie, t0
@@ -65,3 +72,100 @@ _prog_start:
call main
ecall
#ifdef __riscv_i
.extern isr_flag
.balign 32
trap_entry:
#.macro define_const name, value
# .equ \name, \value
#.endm
## 使
#define_const CDR_INT_TXEND, 14
opt_trap_entry:
addi sp,sp,136
#sw ra,4(sp)
#sw sp,8(sp)
#sw gp,12(sp)
#sw tp,16(sp)
sw t0,20(sp)
sw t1,24(sp)
#sw t2,28(sp)
sw s0,32(sp)
sw s1,36(sp)
#sw a0,40(sp)
#sw a1,44(sp)
#sw a2,48(sp)
#sw a3,52(sp)
#sw a4,56(sp)
#sw a5,60(sp)
#sw a6,64(sp)
#sw a7,68(sp)
#sw s2,72(sp)
#sw s3,76(sp)
#sw s4,80(sp)
#sw s5,84(sp)
#sw s6,88(sp)
#sw s7,92(sp)
#sw s8,96(sp)
#sw s9,100(sp)
#sw s10,104(sp)
#sw s11,108(sp)
#sw t3,112(sp)
#sw t4,116(sp)
#sw t5,120(sp)
#sw t6,124(sp)
lui t1, %hi(plic_claim)
lw t0, %lo(plic_claim)(t1) # t0 = &plic_claim
lw t1, 0(t0) # t1 = *plic_claim
sw t1, 0(t0) # *plic_claim = t1
slli s0, t1, 2
la s1, isr_flag
add s1, s1, s0
li t0, 1
sw t0, 0(s1)
#lw ra,4(sp)
#lw sp,8(sp)
#lw gp,12(sp)
#lw tp,16(sp)
lw t0,20(sp)
lw t1,24(sp)
#lw t2,28(sp)
lw s0,32(sp)
lw s1,36(sp)
#lw a0,40(sp)
#lw a1,44(sp)
#lw a2,48(sp)
#lw a3,52(sp)
#lw a4,56(sp)
#lw a5,60(sp)
#lw a6,64(sp)
#lw a7,68(sp)
#lw s2,72(sp)
#lw s3,76(sp)
#lw s4,80(sp)
#lw s5,84(sp)
#lw s6,88(sp)
#lw s7,92(sp)
#lw s8,96(sp)
#lw s9,100(sp)
#lw s10,104(sp)
#lw s11,108(sp)
#lw t3,112(sp)
#lw t4,116(sp)
#lw t5,120(sp)
#lw t6,124(sp)
addi sp,sp,136
mret
#endif

View File

@@ -25,6 +25,11 @@ x31, 最大的服务中断号
#endif
#ifndef __riscv_i
#error "must be compiled in RV32I"
#endif
#define REG_TL2CDR_BASE x24
#define REG_rx_data x25
#define REG_tx_data x26

View File

@@ -1,7 +1,5 @@
#include "tl2cdr.h"
//#include "system_cfg.h"
.extern main
.extern int_svr_code
@@ -25,7 +23,7 @@ _prog_start:
li x13, 0
li x14, 0
li x15, 0
#ifdef __RV32I_MARCH__
#ifdef __riscv_i
li x16, 0
li x17, 0
li x18, 0
@@ -45,6 +43,9 @@ _prog_start:
#endif
li sp, 0x40011000
#ifdef __riscv_i
la t0, trap_entry
#else
li a0, 0
lui t0, %hi(plic_claim)
@@ -52,6 +53,7 @@ _prog_start:
call int_svr_code
mv t0, a0 #trap_entry,RV32I
#endif
csrw mtvec, t0
li t0, 1 << 11
@@ -65,3 +67,100 @@ _prog_start:
ecall
#ifdef __riscv_i
.extern isr_flag
.balign 32
trap_entry:
#.macro define_const name, value
# .equ \name, \value
#.endm
## 使
#define_const CDR_INT_TXEND, 14
opt_trap_entry:
addi sp,sp,136
#sw ra,4(sp)
#sw sp,8(sp)
#sw gp,12(sp)
#sw tp,16(sp)
sw t0,20(sp)
sw t1,24(sp)
#sw t2,28(sp)
sw s0,32(sp)
sw s1,36(sp)
#sw a0,40(sp)
#sw a1,44(sp)
#sw a2,48(sp)
#sw a3,52(sp)
#sw a4,56(sp)
#sw a5,60(sp)
#sw a6,64(sp)
#sw a7,68(sp)
#sw s2,72(sp)
#sw s3,76(sp)
#sw s4,80(sp)
#sw s5,84(sp)
#sw s6,88(sp)
#sw s7,92(sp)
#sw s8,96(sp)
#sw s9,100(sp)
#sw s10,104(sp)
#sw s11,108(sp)
#sw t3,112(sp)
#sw t4,116(sp)
#sw t5,120(sp)
#sw t6,124(sp)
lui t1, %hi(plic_claim)
lw t0, %lo(plic_claim)(t1) # t0 = &plic_claim
lw t1, 0(t0) # t1 = *plic_claim
sw t1, 0(t0) # *plic_claim = t1
slli s0, t1, 2
la s1, isr_flag
add s1, s1, s0
li t0, 1
sw t0, 0(s1)
#lw ra,4(sp)
#lw sp,8(sp)
#lw gp,12(sp)
#lw tp,16(sp)
lw t0,20(sp)
lw t1,24(sp)
#lw t2,28(sp)
lw s0,32(sp)
lw s1,36(sp)
#lw a0,40(sp)
#lw a1,44(sp)
#lw a2,48(sp)
#lw a3,52(sp)
#lw a4,56(sp)
#lw a5,60(sp)
#lw a6,64(sp)
#lw a7,68(sp)
#lw s2,72(sp)
#lw s3,76(sp)
#lw s4,80(sp)
#lw s5,84(sp)
#lw s6,88(sp)
#lw s7,92(sp)
#lw s8,96(sp)
#lw s9,100(sp)
#lw s10,104(sp)
#lw s11,108(sp)
#lw t3,112(sp)
#lw t4,116(sp)
#lw t5,120(sp)
#lw t6,124(sp)
addi sp,sp,136
mret
#endif

View File

@@ -6,5 +6,8 @@
#define SYS_SET_RECV_INFO 2
#define WORKMODE_MASTER 0
#define WORKMODE_SLAVE 1
#endif