From 4b2a52fa9b302f97e5ac9486bd84b5f537c994c0 Mon Sep 17 00:00:00 2001 From: Ruige Lee Date: Tue, 20 May 2025 11:35:11 +0800 Subject: [PATCH] =?UTF-8?q?=E8=BD=AC=E5=8F=91=E5=BB=B6=E8=BF=9F=E7=BC=A9?= =?UTF-8?q?=E5=87=8F=E8=87=B3126=E4=B8=AAcycle?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/main/scala/backBoard/ebus/CDROut.scala | 2 + .../scala/backBoard/shin/SlaveParser.scala | 81 +++++++++---------- .../scala/backBoard/shin/SlaveSendGen.scala | 10 ++- 3 files changed, 45 insertions(+), 48 deletions(-) diff --git a/src/main/scala/backBoard/ebus/CDROut.scala b/src/main/scala/backBoard/ebus/CDROut.scala index aeed6f6..a62caca 100644 --- a/src/main/scala/backBoard/ebus/CDROut.scala +++ b/src/main/scala/backBoard/ebus/CDROut.scala @@ -49,6 +49,8 @@ class CDROut extends Module{ (stateCurr === STATE_PAYLOAD) ) + assert( ~(~io.axis.valid & io.axis.ready) ) + when( stateCurr === STATE_IDLE & stateNext === STATE_PREAMBLE){ //PRE diff --git a/src/main/scala/backBoard/shin/SlaveParser.scala b/src/main/scala/backBoard/shin/SlaveParser.scala index 64ac8b1..4b72c40 100644 --- a/src/main/scala/backBoard/shin/SlaveParser.scala +++ b/src/main/scala/backBoard/shin/SlaveParser.scala @@ -115,47 +115,36 @@ abstract class SlaveParserBase extends Module{ // val downSinkSel = Reg(Bool()) // val upSinkSel = Reg(Bool()) - val downFrameInfo = Reg(new FrameHeader) //下行大包头 - val upFrameInfo = Reg(new FrameHeader) //上行大包头 + // val downFrameInfo = Reg(new FrameHeader) //下行大包头 + // val upFrameInfo = Reg(new FrameHeader) //上行大包头 // val isDownSendBusy = downSendGen.io.frameReq.ready // val isUpSendBusy = upSendGen.io.frameReq.ready - val isDownSendPend = RegInit(false.B) - val isUpSendPend = RegInit(false.B) - // val isUpProbePending //处理主报文 - when( downSendGen.io.frameReq.fire ){ - isDownSendPend := false.B - } .elsewhen( downRecParser.io.frameReq.fire & downRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_COMMON ){//下行来了一个普通包 - isDownSendPend := true.B - downFrameInfo := downRecParser.io.frameReq.bits - } .elsewhen( downRecParser.io.frameReq.fire & downRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_PROBE ){//下行来了一个嗅探包 - isDownSendPend := true.B - downFrameInfo := downRecParser.io.frameReq.bits - } + // when( downSendGen.io.frameReq.fire ){ + + // } .elsewhen( downRecParser.io.frameReq.fire & downRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_COMMON ){//下行来了一个普通包 + // downFrameInfo := downRecParser.io.frameReq.bits + // } .elsewhen( downRecParser.io.frameReq.fire & downRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_PROBE ){//下行来了一个嗅探包 + // downFrameInfo := downRecParser.io.frameReq.bits + // } when( upSendGen.io.frameReq.fire ){ - isUpSendPend := false.B + } .elsewhen( upRecParser.io.frameReq.fire & upRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_COMMON ){ //上行来了一个普通包 - isUpSendPend := true.B - upFrameInfo := upRecParser.io.frameReq.bits + + // upFrameInfo := upRecParser.io.frameReq.bits } - downSendGen.io.frameReq.valid := - isDownSendPend & downFrameInfo.frameStyle === FRAME_STYLE_COMMON & downRecParser.io.subMsgReq.fire | //下行转发 - isDownSendPend & downFrameInfo.frameStyle === FRAME_STYLE_PROBE //下行探针 + downSendGen.io.frameReq.valid := downRecParser.io.frameReq.fire + assert( ~(downSendGen.io.frameReq.valid & ~downSendGen.io.frameReq.ready) ) - // assert( OneHot(isDownSendPend, isDownSendProbe) ) - - downSendGen.io.frameReq.bits := Mux1H(Seq( - isDownSendPend -> downFrameInfo, //下行转发 - //isDownSendProbe -> probeFrame, //下行探针 - )) + downSendGen.io.frameReq.bits := downRecParser.io.frameReq.bits val upFrameProbeInfo: FrameHeader = Wire(new FrameHeader) @@ -164,14 +153,17 @@ abstract class SlaveParserBase extends Module{ upFrameProbeInfo.frameInfo := localDevIndex //其它信息，如probe upSendGen.io.frameReq.valid := - isUpSendPend & upRecParser.io.subMsgReq.fire | //上行转发 - isAckProbe // 上行探针 + (upRecParser.io.frameReq.fire & upRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_COMMON) | + isAckProbe - assert( ~(isUpSendPend & isAckProbe), "Assert Failed, Check Softwave, Probe is Sent while transfering!\n" ) + assert( ~(upSendGen.io.frameReq.valid & ~upSendGen.io.frameReq.ready) ) + + + assert( ~(upRecParser.io.frameReq.fire & isAckProbe), "Assert Failed, Check Softwave, Probe is Sent while transfering!\n" ) upSendGen.io.frameReq.bits := Mux1H(Seq( - isUpSendPend -> upFrameInfo, //上行转发 - isAckProbe -> upFrameProbeInfo, //上行探针 + upRecParser.io.frameReq.fire -> upRecParser.io.frameReq.bits, //上行转发 + isAckProbe -> upFrameProbeInfo, //上行探针 )) @@ -678,14 +670,15 @@ trait SlaveParserProbe{ this: SlaveParserBase => - val isReadyToProbe_Pending = RegInit(false.B) + // val isReadyToProbe_Pending = RegInit(false.B) when( downRecParser.io.frameReq.fire & downRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_PROBE ){ //下行来了一个嗅探包 - isReadyToProbe_Pending := true.B + isReadyToProbe := true.B + assert( downSendGen.io.stateCurr === STATE_IDLE ) } .elsewhen( upRecParser.io.frameReq.fire & upRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_PROBE ){ //上行来了一个嗅探包 - isReadyToProbe_Pending := false.B + isReadyToProbe := false.B } .elsewhen( isWatchDogOverflow ){ - isReadyToProbe_Pending := false.B + isReadyToProbe := false.B } when( downRecParser.io.frameReq.fire & downRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_PROBE ){ //下行来了一个嗅探包 @@ -696,12 +689,12 @@ trait SlaveParserProbe{ this: SlaveParserBase => - val isLastDevice_Pending = RegInit(true.B) + // val isLastDevice = RegInit(true.B) when( upRecParser.io.frameReq.fire & upRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_PROBE ){ //上行来了一个嗅探包 - isLastDevice_Pending := false.B + isLastDevice := false.B } .elsewhen( isWatchDogOverflow ){ - isLastDevice_Pending := true.B + isLastDevice := true.B } @@ -749,13 +742,13 @@ trait SlaveParserProbe{ this: SlaveParserBase => io.isLoop := isLastDevice & ~isReadyToProbe - when( isLastDevice =/= isLastDevice_Pending & ~downSendGen.io.send.valid & ~io.downOut.valid & ~io.upIn.valid ){ - isLastDevice := isLastDevice_Pending - } + // when( isLastDevice =/= isLastDevice_Pending & ~downSendGen.io.send.valid & ~io.downOut.valid & ~io.upIn.valid ){ + // isLastDevice := isLastDevice_Pending + // } - when( isReadyToProbe =/= isReadyToProbe_Pending & ~downSendGen.io.send.valid & ~io.downOut.valid & ~io.upIn.valid ){ - isReadyToProbe := isReadyToProbe_Pending - } + // when( isReadyToProbe =/= isReadyToProbe_Pending & ~downSendGen.io.send.valid & ~io.downOut.valid & ~io.upIn.valid ){ + // isReadyToProbe := isReadyToProbe_Pending + // } } class SlaveParser extends SlaveParserBase diff --git a/src/main/scala/backBoard/shin/SlaveSendGen.scala b/src/main/scala/backBoard/shin/SlaveSendGen.scala index 59d4d44..bb618cd 100644 --- a/src/main/scala/backBoard/shin/SlaveSendGen.scala +++ b/src/main/scala/backBoard/shin/SlaveSendGen.scala @@ -20,6 +20,7 @@ class SlaveSendGenIO extends Bundle{ val send = Decoupled(new AXIS_Bundle(8)) val isError = Output(Bool()) + val stateCurr = Output(UInt(3.W)) } @@ -40,11 +41,11 @@ class SlaveSendGen extends Module{ val STATE_SUBMSG_DATA = 3.U val STATE_CRC = 4.U //CRC校验 val STATE_ERROR = 5.U - // val STATE_WAIT = 6.U + val STATE_WAIT = 6.U val stateNext = Wire(UInt(3.W)) - val stateCurr = RegNext(stateNext, STATE_IDLE) + val stateCurr = RegNext(stateNext, STATE_IDLE); io.stateCurr := stateCurr io.isError := stateCurr === STATE_ERROR @@ -116,18 +117,19 @@ class SlaveSendGen extends Module{ (stateCurr === STATE_IDLE) -> Mux( io.frameReq.fire, STATE_FRAME_HEADER, STATE_IDLE ), (stateCurr === STATE_FRAME_HEADER) -> Mux( io.send.fire, Mux( lengthCnt === (4-1).U, Mux( frameInfo.frameStyle === FRAME_STYLE_COMMON, - Mux(io.subMsgReq.valid, STATE_SUBMSG_HEADER, STATE_ERROR), + Mux(io.subMsgReq.valid, STATE_SUBMSG_HEADER, STATE_WAIT), STATE_CRC ), STATE_FRAME_HEADER), STATE_FRAME_HEADER ), (stateCurr === STATE_SUBMSG_HEADER) -> Mux( io.send.fire, Mux( lengthCnt === (8-1).U, STATE_SUBMSG_DATA, STATE_SUBMSG_HEADER), STATE_SUBMSG_HEADER), (stateCurr === STATE_SUBMSG_DATA) -> Mux( io.send.fire, Mux( lengthCnt === subMsgInfoSel.length-1.U, //已经发送完成该子报文 Mux( frameLenCnt === frameInfo.frameLenAim -1.U, STATE_CRC, //主报文长度达到， 进CRC - Mux( io.subMsgReq.valid, STATE_SUBMSG_HEADER, STATE_ERROR ) ), //主报文长度未到，进下一个子报文 + Mux( io.subMsgReq.valid, STATE_SUBMSG_HEADER, STATE_WAIT ) ), //主报文长度未到，进下一个子报文 STATE_SUBMSG_DATA ), STATE_SUBMSG_DATA ), (stateCurr === STATE_CRC) -> Mux( io.send.fire, Mux( lengthCnt === (4-1).U, STATE_IDLE, STATE_CRC ), STATE_CRC), (stateCurr === STATE_ERROR) -> Mux( io.send.fire, STATE_IDLE, STATE_ERROR), + (stateCurr === STATE_WAIT) -> Mux( io.subMsgReq.valid, STATE_SUBMSG_HEADER, STATE_WAIT), )) io.data(0).ready := io.send.fire & (stateCurr === STATE_SUBMSG_DATA) & (subMsgInfoSel.source === 0.U)