转发功能已经调通

tb/shinTest/SlaveParserTb.v

@@ -11,33 +11,37 @@ module slaveParserTb(
 
 
 wire        io_downIn_ready;
-reg         io_downIn_valid;
-reg  [7:0]  io_downIn_bits_tdata;
-reg         io_downIn_bits_tlast;
-reg         io_downIn_bits_tuser;
-reg         io_downOut_ready;
+reg         io_downIn_valid = 0;
+reg  [7:0]  io_downIn_bits_tdata = 0;
+reg         io_downIn_bits_tlast = 0;
+reg         io_downIn_bits_tuser = 0;
+
+reg         io_downOut_ready = 1;
 wire        io_downOut_valid;
 wire [7:0]  io_downOut_bits_tdata;
 wire        io_downOut_bits_tlast;
 wire        io_downOut_bits_tuser;
+
 wire        io_upIn_ready;
-reg         io_upIn_valid;
-reg  [7:0]  io_upIn_bits_tdata;
-reg         io_upIn_bits_tlast;
-reg         io_upIn_bits_tuser;
-reg         io_upOut_ready;
+reg         io_upIn_valid = 0;
+reg  [7:0]  io_upIn_bits_tdata = 0;
+reg         io_upIn_bits_tlast = 0;
+reg         io_upIn_bits_tuser = 0;
+
+reg         io_upOut_ready = 1;
 wire        io_upOut_valid;
 wire [7:0]  io_upOut_bits_tdata;
 wire        io_upOut_bits_tlast;
 wire        io_upOut_bits_tuser;
+
 wire [14:0] io_sram_r_addr;
 wire [7:0]  io_sram_r_dataw;
-reg  [7:0]  io_sram_r_datar;
+reg  [7:0]  io_sram_r_datar = 0;
 wire        io_sram_r_enw;
 wire        io_sram_r_enr;
 wire [14:0] io_sram_w_addr;
 wire [7:0]  io_sram_w_dataw;
-reg  [7:0]  io_sram_w_datar;
+reg  [7:0]  io_sram_w_datar = 0;
 wire        io_sram_w_enw;
 wire        io_sram_w_enr;
 
@@ -45,7 +49,7 @@ wire        io_sram_w_enr;
 
 
 
-s_SlaveParser SlaveParser(
+SlaveParser s_SlaveParser (
   .clock(clock),
   .reset(reset),
   .io_downIn_ready(io_downIn_ready),
@@ -98,7 +102,7 @@ initial begin
 	#100
 	reset <= 0;
 
-	#160000
+#160000
 	$display("Time Out !!!");
 	$stop;
 end
@@ -109,9 +113,142 @@ end
 
 initial
 begin
-	$dumpfile("./build/wave.vcd"); //生成的vcd文件名称
+	$dumpfile("./tb/build/wave.vcd"); //生成的vcd文件名称
 	$dumpvars(0, slaveParserTb);//tb模块名称
 end
 
+
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+
+reg [7:0] testDownData[0:1000];
+
+initial begin
+  testDownData[0] = 8'hde;
+  testDownData[1] = 8'h0e;
+end
+
+// reg [11:0] testDownDataCnt = 0;
+
+
+
+
+
+
+// always @(posedge clock) begin
+  
+// end
+
+
+initial begin
+  #1000
+    @(posedge clock) #3 
+    io_downIn_valid = 1;
+    io_downIn_bits_tdata = 8'h20;
+
+    @( io_downIn_valid & io_downIn_ready)
+
+    @(posedge clock) #3 
+    io_downIn_valid = 1;
+    io_downIn_bits_tdata = 8'h00; //heeader length 512
+
+
+
+
+
+    for( integer i = 0; i < 8; i = i + 1 ) begin
+
+      @(posedge clock) #3 
+      io_downIn_valid = 1;
+      io_downIn_bits_tdata = $random; 
+
+      @(posedge clock) #3 
+      io_downIn_valid = 1;
+      io_downIn_bits_tdata = $random;
+
+      @(posedge clock) #3 
+      io_downIn_valid = 1;
+      io_downIn_bits_tdata = $random;
+
+      @(posedge clock) #3 
+      io_downIn_valid = 1;
+      io_downIn_bits_tdata = $random;
+
+      @(posedge clock) #3 
+      io_downIn_valid = 1;
+      io_downIn_bits_tdata = 8'h0;
+
+      @(posedge clock) #3 
+      io_downIn_valid = 1;
+      io_downIn_bits_tdata = 8'd56;
+
+      @(posedge clock) #3 
+      io_downIn_valid = 1;
+      io_downIn_bits_tdata = $random;
+
+      @(posedge clock) #3 
+      io_downIn_valid = 1;
+      io_downIn_bits_tdata = $random;
+
+      for( integer j = 0; j < 64-8; j = j+ 1 )begin
+        @(posedge clock) #3 
+        io_downIn_valid = 1;
+        io_downIn_bits_tdata = 8'ha5; //heeader length 512
+      end
+    end
+
+    @(posedge clock) #3 
+    io_downIn_valid = 1;
+    io_downIn_bits_tdata = $random;
+    io_downIn_bits_tlast = 0;
+    io_downIn_bits_tuser = 0;
+
+    @(posedge clock) #3 
+    io_downIn_valid = 1;
+    io_downIn_bits_tdata = $random;
+    io_downIn_bits_tlast = 0;
+    io_downIn_bits_tuser = 0;
+
+    @(posedge clock) #3 
+    io_downIn_valid = 1;
+    io_downIn_bits_tdata = $random;
+    io_downIn_bits_tlast = 0;
+    io_downIn_bits_tuser = 0;
+
+    @(posedge clock) #3 
+    io_downIn_valid = 1;
+    io_downIn_bits_tdata = $random;
+    io_downIn_bits_tlast = 1;
+    io_downIn_bits_tuser = 0;
+
+    @(posedge clock) #3 
+    io_downIn_valid = 0;
+    io_downIn_bits_tlast = 0;
+end
+
+
+
+
+
+
+
+
 endmodule