From 4501afa4e90c1c715f44a0577406f83057ea90b6 Mon Sep 17 00:00:00 2001 From: Ruige Lee Date: Mon, 13 Oct 2025 09:52:58 +0800 Subject: [PATCH] =?UTF-8?q?=E8=B0=83=E6=95=B4=E7=9C=8B=E9=97=A8=E7=8B=9717?= =?UTF-8?q?=E4=BC=98=E5=85=88=E7=BA=A7=E6=9D=A1=E4=BB=B6?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/main/scala/backBoard/shin/MstSlvSwitch.scala | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/main/scala/backBoard/shin/MstSlvSwitch.scala b/src/main/scala/backBoard/shin/MstSlvSwitch.scala index 0a4b53c..46ea84f 100644 --- a/src/main/scala/backBoard/shin/MstSlvSwitch.scala +++ b/src/main/scala/backBoard/shin/MstSlvSwitch.scala @@ -506,14 +506,14 @@ trait MstSlvSwitchWatchDog{ this: MstSlvSwitchBase => //看门狗17 val wdtRec2RecCnt = RegInit(0.U(32.W)) - when( interface.io.cReg.wdtEnable.extract(17) & (wdtRec2RecCnt < interface.io.cReg.wdtTarCnt(17)) ){ - wdtRec2RecCnt := wdtRec2RecCnt + 1.U - } .elsewhen( + when( ~interface.io.cReg.wdtEnable.extract(17) || downCDRInAxis.io.axis.fire || (wdtRec2RecCnt >= interface.io.cReg.wdtTarCnt(17)) ){ wdtRec2RecCnt := 0.U + } .elsewhen( interface.io.cReg.wdtEnable.extract(17) & (wdtRec2RecCnt < interface.io.cReg.wdtTarCnt(17)) ){ + wdtRec2RecCnt := wdtRec2RecCnt + 1.U } interface.io.wdtTrigger(17) := wdtRec2RecCnt === interface.io.cReg.wdtTarCnt(17)