From 430bb94381a96b15a8e6efd5bec853144f03d00a Mon Sep 17 00:00:00 2001 From: RuigeLee Date: Wed, 30 Oct 2024 17:11:59 +0800 Subject: [PATCH] =?UTF-8?q?=E4=B8=8B=E8=A1=8C=E8=BD=AC=E5=8F=91=E6=B5=8B?= =?UTF-8?q?=E8=AF=95=E9=80=9A=E8=BF=87=EF=BC=8C=E5=B7=AE=E4=B8=80=E4=B8=AA?= =?UTF-8?q?last=E8=AE=BE=E5=A4=87=E5=90=AF=E5=8A=A8=E4=B8=8A=E8=A1=8C?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Makefile | 2 +- src/main/scala/backBoard/pico/TLCDR.scala | 1 - tb/backSys_tb.v | 2 +- tb/sw/src/SlvMain.c | 113 ++++++++++------------ tb/sw/src/slvStartup.S | 33 ++----- 5 files changed, 59 insertions(+), 92 deletions(-) diff --git a/Makefile b/Makefile index 22ba027..2ee0af6 100644 --- a/Makefile +++ b/Makefile @@ -87,7 +87,7 @@ sw: - riscv64-unknown-elf-gcc -Os -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs \ + riscv64-unknown-elf-gcc -O3 -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs \ -I ./tb/sw/ -I ./tb/sw/src \ -c ./tb/sw/src/slvMain.c \ -o ./tb/sw/build/slvMain.o diff --git a/src/main/scala/backBoard/pico/TLCDR.scala b/src/main/scala/backBoard/pico/TLCDR.scala index a2df2c7..3894be8 100644 --- a/src/main/scala/backBoard/pico/TLCDR.scala +++ b/src/main/scala/backBoard/pico/TLCDR.scala @@ -205,7 +205,6 @@ class TLCDR(edge: TLEdgeIn)(implicit p: Parameters) extends TLCDRBase(edge) with io.interrupt(0) := intTxError io.interrupt(1) := intRxError io.interrupt(2) := intRxStart - io.interrupt(3) := intRxEnd diff --git a/tb/backSys_tb.v b/tb/backSys_tb.v index 53101b8..188f165 100644 --- a/tb/backSys_tb.v +++ b/tb/backSys_tb.v @@ -104,7 +104,7 @@ initial begin reset <= 0; - # 10000000 + # 1000000 $display("Time Out !!!"); $stop; end diff --git a/tb/sw/src/SlvMain.c b/tb/sw/src/SlvMain.c index f31acfc..eafb9c8 100644 --- a/tb/sw/src/SlvMain.c +++ b/tb/sw/src/SlvMain.c @@ -48,20 +48,14 @@ void main() asm volatile ( "1:\n" - "beqz sp, 1b\n" - "li ra, 1\n" - "sub sp, sp, ra\n" + "andi ra, sp, 0x04\n" + "beqz ra, 1b\n" + "andi sp, sp, 0xFB\n" ); readDat = *cdr_0_rx_rxFifo; operator = (readDat >> 16) & 0xf; - downRecvLen = readDat >> 24; - - asm volatile ( - "1:\n" - "beqz sp, 1b\n" - "addi sp, sp, -1\n" - ); + downRecvLen = readDat >> 20; readDat = *cdr_0_rx_rxFifo; @@ -73,48 +67,51 @@ void main() //接收本地包 for( uint8_t i = 0; i < 8/4; i++ ){ - asm volatile ( - "1:\n" - "beqz sp, 1b\n" - "addi sp, sp, -1\n" - ); + asm volatile ( + "andi ra, sp, 0x08\n" + "1:\n" + "bnez ra, 1b\n" //error + ); readDat = *cdr_0_rx_rxFifo; } // 下行包头 *cdr_0_tx_txLen = downRecvLen; //downSendLen + 8 - *cdr_0_tx_txFifo = (downSendLen << 24) |( 0 << 16) | 0; + *cdr_0_tx_txFifo = (downSendLen << 20) |( 0 << 16) | 0; *cdr_0_tx_txFifo = 0; //下行负载 - for( uint16_t i = 0; i < (downSendLen >> 3); i++ ){ //一次传4byte - asm volatile ( - "1:\n" - "beqz sp, 1b\n" - "addi sp, sp, -1\n" - ); - *cdr_0_tx_txFifo = *cdr_0_rx_rxFifo; //接收即发送 + asm volatile ( + "lui t0, %hi(0x40000000)\n" + ); + for( uint32_t i = 0; i < (downSendLen >> 2); i++ ){ //一次传4byte + asm volatile ( + // "andi ra, sp, 0x08\n" + // "1:\n" + // "bnez ra, 1b\n" //error 速度不够，不再检查接收 + // "lui t0, %hi(0x40000000)\n" + "lw t1, 0x1c(t0)\n" + "sw t1, 0x08(t0)\n" + + // : : : "a0", "a1" + ); + //*cdr_0_tx_txFifo = *cdr_0_rx_rxFifo; //接收即发送 } //CRC asm volatile ( + "andi ra, sp, 0x08\n" "1:\n" - "beqz sp, 1b\n" - "addi sp, sp, -1\n" + "bnez ra, 1b\n" //error ); uint32_t crc = *cdr_0_rx_rxFifo; //CRC - asm volatile ( //等待发送完成标志 - "1:\n" - "andi ra, x4, 0x4\n" - "beqz x4, 1b\n" - ); - + //等待接收完成标志 asm volatile ( - "beqz sp, 2f\n" - "1:" - "j 1b\n" - "2:\n" + "1:\n" + "andi ra, sp, 0x08\n" + "beqz ra, 1b\n" + "andi sp, sp, 0xF7\n" ); @@ -123,48 +120,38 @@ void main() //接收第一个包 asm volatile ( "1:\n" - "beqz sp, 1b\n" - "addi sp, sp, -1\n" + "andi ra, sp, 0x40\n" + "beqz ra, 1b\n" + "andi sp, sp, 0xBF\n" ); readDat = *cdr_1_rx_rxFifo; operator = (readDat >> 16) & 0xf; - upRecvLen = readDat >> 24; + upRecvLen = readDat >> 20; totNum = slvNum + (upRecvLen >> 3) - 1; //接收第二个包 asm volatile ( - "1:\n" - "beqz sp, 1b\n" - "addi sp, sp, -1\n" + "andi ra, sp, 0x80\n" + "1:\n" + "bnez ra, 1b\n" //error ); readDat = *cdr_1_rx_rxFifo; //发送上行包头 *cdr_1_tx_txLen = upRecvLen + 16; //downSendLen + 8 - *cdr_1_tx_txFifo = ((upRecvLen + 8) << 24) |( 0 << 16) | 0; + *cdr_1_tx_txFifo = ((upRecvLen + 8) << 20) |( 0 << 16) | 0; *cdr_1_tx_txFifo = 0; for( uint8_t i = 0; i < 8/4; i ++ ){ *cdr_1_tx_txFifo = 0; } - for( uint16_t i = 0; i < upRecvLen >> 3; i ++ ){ //一次传4byte + for( uint16_t i = 0; i < upRecvLen >> 2; i ++ ){ //一次传4byte asm volatile ( + "andi ra, sp, 0x80\n" "1:\n" - - "andi ra, x4, 0x40\n" - "beqz ra, 3f\n" - - "2:\n" - "lui ra, %hi(0x40000000)\n" - "lw ra, 0x80(ra)\n" - "andi ra, ra, 0x20\n" - "bnez ra, 2b\n" - - "3:\n" - "beqz sp, 1b\n" - "addi sp, sp, -1\n" + "bnez ra, 1b\n" //error ); *cdr_1_tx_txFifo = *cdr_1_rx_rxFifo; //接收即发送 @@ -172,16 +159,18 @@ void main() //CRC asm volatile ( + "andi ra, sp, 0x80\n" "1:\n" - "beqz sp, 1b\n" - "addi sp, sp, -1\n" + "bnez ra, 1b\n" //error ); crc = *cdr_1_rx_rxFifo; //CRC + + //等待接收完成标志 asm volatile ( - "beqz sp, 2f\n" - "1:" - "j 1b\n" - "2:\n" + "1:\n" + "andi ra, sp, 0x80\n" + "beqz ra, 1b\n" + "andi sp, sp, 0x7F\n" ); } else if ( operator == 1 ){ diff --git a/tb/sw/src/slvStartup.S b/tb/sw/src/slvStartup.S index 6384ed3..55946a2 100644 --- a/tb/sw/src/slvStartup.S +++ b/tb/sw/src/slvStartup.S @@ -27,36 +27,15 @@ trap_entry: # q寄存器已经禁用， Without the q-registers, the irq return address will be stored in x3 (gp) and the IRQ bitmask in x4 (tp), - # addi x15, x4, 0 + # io.interrupt(0) := intTxError + # io.interrupt(1) := intRxError + # io.interrupt(2) := intRxStart + # io.interrupt(3) := intRxEnd -# io.interrupt(0) := intTxError -# io.interrupt(1) := intTxFifoFull -# io.interrupt(2) := intTxFinish -# io.interrupt(3) := intRxError -# io.interrupt(4) := intRxValid -# io.interrupt(5) := intTxError -# io.interrupt(6) := intTxFifoFull -# io.interrupt(7) := intTxFinish + or sp, sp, x4 + -# io.interrupt(8) := intRxError -# io.interrupt(9) := intRxValid - # andi ra, x4, 0x02 - # bnez ra, 1f - # addi, sp, sp, 2048 -1: - andi ra, x4, 0x10 - bnez ra, 2f - addi sp, sp, 1 -2: - # andi ra, x4, 0x40 - # bnez ra, 3f - # addi, sp, sp, 2048 -3: - andi ra, x4, 0x200 - bnez ra, 4f - addi sp, sp, 1 -4: picorv32_retirq_insn()