diff --git a/Makefile b/Makefile
index 798a512..4b44ffa 100644
--- a/Makefile
+++ b/Makefile
@@ -1,3 +1,11 @@
+TARGET=riscv64-unknown-elf
+RVCC=$(TARGET)-gcc
+RVCCVERSION=$(shell $(RVCC) --version | grep ^$(RVCC) | sed 's/^.* //g')
+MARCH=-march=rv32i -mabi=ilp32
+CFLAGS=-O2
+ifeq "$(RVCCVERSION)" "12.2.0"
+   	MARCH=-march=rv32izicsr -mabi=ilp32
+endif
 
 .PHONY: compile tb wave
 
@@ -25,7 +33,6 @@ back:
 	cp ./src/main/verilog/defineParam.v ./generated/back/
 
 
-
 ef: 
 	sbt "test:runMain test.testModule"
 
@@ -61,64 +68,64 @@ sw:
 	rm ./tb/sw/build/* -f
 	mkdir -p ./tb/sw/build/
 
-	riscv64-unknown-elf-gcc -Os -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
+	$(RVCC) -ggdb $(MARCH) $(CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
 	-I ./tb/sw/ -I ./tb/sw/src \
 	-c ./tb/sw/src/mstStartup.S \
 	-o ./tb/sw/build/mstStartup.o
 
-	riscv64-unknown-elf-gcc -O3 -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs \
+	$(RVCC) -ggdb $(MARCH) $(CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
 	-I ./tb/sw/ -I ./tb/sw/src \
 	-I ./tb/sw/tl2cdr \
-	-c ./tb/sw/src/mstMain.c \
+	-c ./tb/sw/src/MstMain.c \
 	-o ./tb/sw/build/mstMain.o
 
-	# riscv64-unknown-elf-gcc -Os -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
+	# $(RVCC) -ggdb $(MARCH) $(CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
 	# -I ./tb/sw/ -I ./tb/sw/src \
 	# -c ./tb/sw/src/mstMain.S \
 	# -o ./tb/sw/build/mstMain.o
 
-	riscv64-unknown-elf-gcc -Os -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
+	$(RVCC) -ggdb $(MARCH) $(CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
 	-T ./tb/sw/linker.lds \
 	./tb/sw/build/mstStartup.o \
 	./tb/sw/build/mstMain.o \
 	-o ./tb/sw/build/mstTest.elf
 
-	riscv64-unknown-elf-objcopy -O binary ./tb/sw/build/mstTest.elf  ./tb/sw/build/mstTest.bin
+	$(TARGET)-objcopy -O binary ./tb/sw/build/mstTest.elf  ./tb/sw/build/mstTest.bin
 	
-	riscv64-unknown-elf-objdump --disassemble-all --disassemble-zeroes --section=.text --section=.text.startup --section=.text.init --section=.data --section=.bss --section=.rodata --section=.trap_entry ./tb/sw/build/mstTest.elf > ./tb/sw/build/mstTest.dump
+	$(TARGET)-objdump --disassemble-all --disassemble-zeroes --section=.text --section=.text.startup --section=.text.init --section=.data --section=.bss --section=.rodata --section=.trap_entry ./tb/sw/build/mstTest.elf > ./tb/sw/build/mstTest.dump
 
-	riscv64-unknown-elf-objcopy -O verilog  ./tb/sw/build/mstTest.elf  ./tb/sw/build/mstTest.verilog
+	$(TARGET)-objcopy -O verilog  ./tb/sw/build/mstTest.elf  ./tb/sw/build/mstTest.verilog
 	sed -i 's/@400/@000/g' ./tb/sw/build/mstTest.verilog
 
 
 
-	riscv64-unknown-elf-gcc -O3 -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs \
+	$(RVCC) -O3 -ggdb $(MARCH) $(CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
 	-I ./tb/sw/ -I ./tb/sw/src \
 	-I ./tb/sw/tl2cdr \
-	-c ./tb/sw/src/slvMain.c \
+	-c ./tb/sw/src/SlvMain.c \
 	-o ./tb/sw/build/slvMain.o
 
-	riscv64-unknown-elf-gcc -Os -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
+	$(RVCC) -Os -ggdb $(MARCH) $(CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
 	-I ./tb/sw/ -I ./tb/sw/src \
 	-c ./tb/sw/src/slvStartup.S \
 	-o ./tb/sw/build/slvStartup.o
 
-	# riscv64-unknown-elf-gcc -Os -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
+	# $(RVCC) -Os -ggdb $(MARCH) $(CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
 	# -I ./tb/sw/ -I ./tb/sw/src \
 	# -c ./tb/sw/src/slvMain.S \
 	# -o ./tb/sw/build/slvMain.o
 
-	riscv64-unknown-elf-gcc -Os -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
+	$(RVCC) -Os -ggdb $(MARCH) $(CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
 	-T ./tb/sw/linker.lds \
 	./tb/sw/build/slvStartup.o \
 	./tb/sw/build/slvMain.o \
 	-o ./tb/sw/build/slvTest.elf
 
-	riscv64-unknown-elf-objcopy -O binary ./tb/sw/build/slvTest.elf  ./tb/sw/build/slvTest.bin
+	$(TARGET)-objcopy -O binary ./tb/sw/build/slvTest.elf  ./tb/sw/build/slvTest.bin
 
-	riscv64-unknown-elf-objdump --disassemble-all --disassemble-zeroes --section=.text --section=.text.startup --section=.text.init --section=.data --section=.bss --section=.rodata --section=.trap_entry ./tb/sw/build/slvTest.elf > ./tb/sw/build/slvTest.dump
+	$(TARGET)-objdump --disassemble-all --disassemble-zeroes --section=.text --section=.text.startup --section=.text.init --section=.data --section=.bss --section=.rodata --section=.trap_entry ./tb/sw/build/slvTest.elf > ./tb/sw/build/slvTest.dump
 
-	riscv64-unknown-elf-objcopy -O verilog  ./tb/sw/build/slvTest.elf  ./tb/sw/build/slvTest.verilog
+	$(TARGET)-objcopy -O verilog  ./tb/sw/build/slvTest.elf  ./tb/sw/build/slvTest.verilog
 	sed -i 's/@400/@000/g' ./tb/sw/build/slvTest.verilog
 
 	python3 ./tb/sw/bin_to_hex.py