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处理断言及状态机卡住问题，从这个版本开始，所有断言错误都应该处理；recParser的错误状态会触发5、6号不可屏蔽中断，软件需要清中断然后recParser恢复状态，cdrout溢出问题不再触发中断，该次传输将会发生至少两次错误

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This commit is contained in:
Ruige Lee
2025-05-26 11:52:40 +08:00
parent 5fa5a4c244
commit 370e6b119c
6 changed files with 55 additions and 15 deletions
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10
src/main/scala/backBoard/shin/SlaveSendGen.scala
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@@ -40,14 +40,14 @@ class SlaveSendGen extends Module{
val STATE_SUBMSG_HEADER = 2.U
val STATE_SUBMSG_DATA = 3.U
val STATE_CRC = 4.U //CRC校验
val STATE_ERROR = 5.U
//val STATE_ERROR = 5.U
val STATE_WAIT = 6.U
val stateNext = Wire(UInt(3.W))
val stateCurr = RegNext(stateNext, STATE_IDLE); io.stateCurr := stateCurr
io.isError := stateCurr === STATE_ERROR
io.isError := false.B//stateCurr === STATE_ERROR
crc.io.isEnable := io.send.fire & (
stateCurr === STATE_FRAME_HEADER |
@@ -128,7 +128,7 @@ class SlaveSendGen extends Module{
STATE_SUBMSG_DATA
), STATE_SUBMSG_DATA ),
(stateCurr === STATE_CRC) -> Mux( io.send.fire, Mux( lengthCnt === (4-1).U, STATE_IDLE, STATE_CRC ), STATE_CRC),
(stateCurr === STATE_ERROR) -> Mux( io.send.fire, STATE_IDLE, STATE_ERROR),
// (stateCurr === STATE_ERROR) -> Mux( io.send.fire, STATE_IDLE, STATE_ERROR),
(stateCurr === STATE_WAIT) -> Mux( io.subMsgReq.valid, STATE_SUBMSG_HEADER, STATE_WAIT),
))
@@ -191,8 +191,8 @@ class SlaveSendGen extends Module{
(stateCurr === STATE_CRC) -> tdata_crc,
))
io.send.bits.tuser := (stateCurr === STATE_ERROR & stateNext === STATE_IDLE)
io.send.bits.tlast := (stateCurr === STATE_CRC & stateNext === STATE_IDLE) || (stateCurr === STATE_ERROR & stateNext === STATE_IDLE)
io.send.bits.tuser := false.B//(stateCurr === STATE_ERROR & stateNext === STATE_IDLE)
io.send.bits.tlast := (stateCurr === STATE_CRC & stateNext === STATE_IDLE) //|| (stateCurr === STATE_ERROR & stateNext === STATE_IDLE)