主机拆分cdr错误到独立寄存器

This commit is contained in:
RuigeLee
2024-05-14 20:58:31 +08:00
parent 9c56c611e2
commit 370413db26

View File

@@ -517,7 +517,7 @@ trait BackBoardMstLVDSUnicast{ this: BackBoardMstLVDSBase =>
trait BackBoardMstLVDSError{ this: BackBoardMstLVDSBase =>
val shiftClosedLoopErr = ShiftRegisters( lvdsMst.io.closed_loop_err | lvdsMst.io.upstream_cdr_err, 6, false.B, true.B )
val shiftClosedLoopErr = ShiftRegisters( lvdsMst.io.closed_loop_err, 6, false.B, true.B )
when( ~shiftClosedLoopErr(0) & lvdsMst.io.closed_loop_err ){
//slvOffLine := lvdsMst.io.link_err_location(5,0)
@@ -558,13 +558,13 @@ trait BackBoardMstLVDSError{ this: BackBoardMstLVDSBase =>
// when( lvdsMst.io.upstream_cdr_err ){
// // statusCDRErr := true.B
// mirrorReg.io.addrB := 11.U
// mirrorReg.io.datawB := 1.U
// mirrorReg.io.enwB := true.B
// interrupt := true.B
// }
when( lvdsMst.io.upstream_cdr_err ){
// statusCDRErr := true.B
mirrorReg.io.addrB := 11.U
mirrorReg.io.datawB := 1.U
mirrorReg.io.enwB := true.B
interrupt := true.B
}
when( lvdsMst.io.upstream_crc_valid & lvdsMst.io.upstream_crc_err ){
// statusCRCErr := true.B