主机拆分cdr错误到独立寄存器
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@@ -517,7 +517,7 @@ trait BackBoardMstLVDSUnicast{ this: BackBoardMstLVDSBase =>
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trait BackBoardMstLVDSError{ this: BackBoardMstLVDSBase =>
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val shiftClosedLoopErr = ShiftRegisters( lvdsMst.io.closed_loop_err | lvdsMst.io.upstream_cdr_err, 6, false.B, true.B )
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val shiftClosedLoopErr = ShiftRegisters( lvdsMst.io.closed_loop_err, 6, false.B, true.B )
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when( ~shiftClosedLoopErr(0) & lvdsMst.io.closed_loop_err ){
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//slvOffLine := lvdsMst.io.link_err_location(5,0)
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@@ -558,13 +558,13 @@ trait BackBoardMstLVDSError{ this: BackBoardMstLVDSBase =>
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// when( lvdsMst.io.upstream_cdr_err ){
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// // statusCDRErr := true.B
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// mirrorReg.io.addrB := 11.U
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// mirrorReg.io.datawB := 1.U
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// mirrorReg.io.enwB := true.B
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// interrupt := true.B
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// }
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when( lvdsMst.io.upstream_cdr_err ){
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// statusCDRErr := true.B
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mirrorReg.io.addrB := 11.U
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mirrorReg.io.datawB := 1.U
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mirrorReg.io.enwB := true.B
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interrupt := true.B
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}
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when( lvdsMst.io.upstream_crc_valid & lvdsMst.io.upstream_crc_err ){
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// statusCRCErr := true.B
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